IP Roundtable, Part 6: Integration Issues Ahead
In the previous segment of this experts' roundtable we talked about the advantages EDA companies may have in developing and licensing IP. Today we turn our attention to IP integration issues. Taking part in today's discussion are: Mike Gianfagna, vice president of corporate marketing at Atrenta; Warren Savage, CEO of IPextreme; John Koeter, vice president of marketing for the solutions group at Synopsys; and Chris Rowen, Cadence Fellow and CTO at Tensilica.
To read the full article, click here
Related Semiconductor IP
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- MIPI SoundWire I3S Peripheral IP
- LPDDR6/5X/5 Controller IP
- Post-Quantum ML-KEM IP Core
- MIPI SoundWire I3S Manager IP
Related Blogs
- Understanding USB IP and Its Role in SOC Integration
- I3C IP: Enabling Efficient Communication and Sensor Integration
- Advanced SoC Development Uses Next-Gen IP Integration Tools
- Efficient IP Packaging for Today’s SoC Integration
Latest Blogs
- ML-DSA explained: Quantum-Safe digital Signatures for secure embedded Systems
- Efficiency Defines The Future Of Data Movement
- Why Standard-Cell Architecture Matters for Adaptable ASIC Designs
- ML-KEM explained: Quantum-safe Key Exchange for secure embedded Hardware
- Rivos Collaborates to Complete Secure Provisioning of Integrated OpenTitan Root of Trust During SoC Production