The interface makes the FPGA
November 26, 2009
Announcements from the FPGA industry this week continue the trend of the past year of placing the serial interface before the gate count or the core-logic IP – an understandable strategy, given the number of vertical markets for which interface virtually defines application (note that I did not say raw speed, though that is a secondary consideration).
Related Semiconductor IP
- JPEG XL Encoder
- LPDDR6/5X/5 PHY V2 - Intel 18A-P
- ML-KEM Key Encapsulation & ML-DSA Digital Signature Engine
- MIPI SoundWire I3S Peripheral IP
- ML-DSA Digital Signature Engine
Related Blogs
- On-chip interfaces gain importance in next-gen FPGAs
- Intel’s Atom-based Tunnel Creek SOC with integrated PCIe interface opens new era for embedded developers
- Altera's intros 28nm Stratix V FPGA family
- Xilinx unleashes triad of low-power, 28nm FPGA families with very promising characteristics for memory interfacing