How Secure DDR Interfaces Protect DRAM from Memory Attacks
In 2017, the credit bureau Equifax announced that hackers had breached its system, unleashing the personal information of 147 million people. As a result, the company has settled a class action suit for $425 million to aid those impacted. The damages included identity theft, fraud, financial losses, and the expenses to clean it up. Whether the threat is identity theft, fraud, national security, safety, or some combination, data is at the center of it all and must be protected. While the Equifax hack was executed through a security flaw in a software tool, it’s a cautionary tale about why you need to protect data in your electronic systems. Vulnerabilities exist not only in software but in hardware, too.
The reality is that as systems become more complex, hardware can be a point of entry for those with nefarious intent. Multi-chip designs are gaining traction, and the attack surface is increasing.
Security is taking center stage in the semiconductor industry and securing system-on-chip (SoC) interfaces and the data that moves across them can prevent data from being accessed, deleted, or otherwise manipulated by bad actors. Whether you are protecting data in high-performance computing (HPC), mobile, IoT or automotive SoCs, security implementations need to be optimized to preserve the performance of the interfaces while reducing the impact on latency and area.
High-bandwidth interfaces such as DDR are proliferating, and their speeds continue to grow from generation to generation. If you want to protect your data, one of the key areas to secure is your off-chip dynamic random-access memory (DRAM).
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