Has IP moved to Subsystem? Will IP-SoC 2011 bring answers?
I have shared with you the most interesting I have heard during IP-SoC 2010, in two blogs, Part I was about IP market forecast (apparently my optimistic view was quite different from the rather pessimistic vision shared by SC analysts) and Part II, named “System Level Mantra”, was strongly influenced by Cadence clever presentation, but this was before Cadence decided to drop “EDA360”, as least according with Dan Nenni in “CDNS EDA360 is dead”.
To read the full article, click here
Related Semiconductor IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- 1G BASE-T Ethernet Verification IP
- Network-on-Chip (NoC)
- Microsecond Channel (MSC/MSC-Plus) Controller
- 12-bit, 400 MSPS SAR ADC - TSMC 12nm FFC
Related Blogs
- Empowering AI-Enabled Systems with MIPI C/D-PHY Combo IP: The Complete Audio-Visual Subsystem and AI
- When Attempts To Establish IP Empires Died
- World IP Day: A Time to Reflect on the Value of Semiconductor IP
- Rambus CXL IP: A Journey from Spec to Compliance
Latest Blogs
- Rivian’s autonomy breakthrough built with Arm: the compute foundation for the rise of physical AI
- AV1 Image File Format Specification Gets an Upgrade with AVIF v1.2.0
- Industry’s First End-to-End eUSB2V2 Demo for Edge AI and AI PCs at CES
- Integrating Post-Quantum Cryptography (PQC) on Arty-Z7
- UA Link PCS customizations from 800GBASE-R Ethernet PCS Clause 172