EDPS: SoC FPGAs
April 9, 2012
Mike Hutton of Altera spends most of his time thinking about a couple of process generations out. So a lot of what he worries about is not so much the fine-grained architecture of what they put on silicon, but rather how the user is going to get their system implemented. 2014 is predicted to be the year in which over half of all FPGAs will feature and embedded processor, and at the higher end of Altera and Xilinx's product lines it is already well over that. Of course SoCs are everywhere, in both regular silicon (Apple, Nvidia, Qualcomm...) and FPGA SoCs from Xilinx, Altera and others.
To read the full article, click here
Related Semiconductor IP
- eUSB2V2.0 Controller + PHY IP
- I/O Library with LVDS in SkyWater 90nm
- 50G PON LDPC Encoder/Decoder
- UALink Controller
- RISC-V Debug & Trace IP
Related Blogs
- Altera's new ARM-based SoC FPGAs
- Altera's Real Impact with ARM based SOC FPGAs
- Xilinx ARMs FPGAs, Altera to MIPSify Them
- Why Is Intel Fabbing Achronix FPGAs?