EDPS: SoC FPGAs
Mike Hutton of Altera spends most of his time thinking about a couple of process generations out. So a lot of what he worries about is not so much the fine-grained architecture of what they put on silicon, but rather how the user is going to get their system implemented. 2014 is predicted to be the year in which over half of all FPGAs will feature and embedded processor, and at the higher end of Altera and Xilinx's product lines it is already well over that. Of course SoCs are everywhere, in both regular silicon (Apple, Nvidia, Qualcomm...) and FPGA SoCs from Xilinx, Altera and others.
To read the full article, click here
Related Semiconductor IP
- EMFI Detector
- Sine Wave Frequency Generator
- CAN XL Verification IP
- Rad-Hard GPIO, ODIO & LVDS in SkyWater 90nm
- 1.22V/1uA Reference voltage and current source
Related Blogs
- Altera's new ARM-based SoC FPGAs
- Altera's Real Impact with ARM based SOC FPGAs
- Xilinx ARMs FPGAs, Altera to MIPSify Them
- Why Is Intel Fabbing Achronix FPGAs?
Latest Blogs
- Unleashing Leading On-Device AI Performance and Efficiency with New Arm C1 CPU Cluster
- The Perfect Solution for Local AI
- UA Link vs Interlaken: What you need to know about the right protocol for AI and HPC interconnect fabrics
- Analog Design and Layout Migration automation in the AI era
- UWB, Digital Keys, and the Quest for Greater Range