The CEVA-MM3101: An Imaging-Optimized DSP Core Swings for an Embedded Vision Home Run
January 26, 2012
As last summer's formation of the Embedded Vision Alliance suggests, the transition from computer-based intelligent image processing to more compact, cost-effective and energy-efficient embedded vision products is already well underway. CEVA, a company to date best known for its digital signal processing cores found in cellular baseband IC designs, hopes to harness this trend (and, in the process, expand its serviceable market footprint) with the CEVA-MM3101, its latest imaging-tailored offering, which for the first time has been specifically crafted for vision processing applications.
Related Semiconductor IP
- 5G IoT DSP
- 5G RAN DSP
- 32-bit 8-stage superscalar processor that supports RISC-V specification, including GCNP (DSP)
- Compact High-Speed 32-bit CPU Core with DSP
- 16-bit fixed-point general purpose DSP
Related Blogs
- Oxford Digital Offers Small Audio DSP Core With Graphical Programming
- MIPS' Aptiv: Will New Core Families Make the Company More Competitive?
- DSP IP core? CEVA is the undisputed worldwide leader, with 90% market share
- Adapteva's Epiphany Floating Point Processor Core: A Leading-Edge Lithography May Finally Open Doors
Latest Blogs
- lowRISC Tackles Post-Quantum Cryptography Challenges through Research Collaborations
- How to Solve the Size, Weight, Power and Cooling Challenge in Radar & Radio Frequency Modulation Classification
- Programmable Hardware Delivers 10,000X Improvement in Verification Speed over Software for Forward Error Correction
- The Integrated Design Challenge: Developing Chip, Software, and System in Unison
- Introducing Mi-V RV32 v4.0 Soft Processor: Enhanced RISC-V Power