Is Buying IPs From Vendors A Foregone Conclusion? Think Again...
There has been a huge trend lately for fabless companies to move from making their own IPs and VIPs to buying them from vendors. This has obvious (and popularly stated) advantages. You can potentially fasten your chip’s time-to-market by buying standard components off-the-shelf and assembling them with other components built inhouse. But this is far from a foregone conclusion...
There are four IP development models possible:
1. Buy IP and VIP, then integrate them inhouse
2. Develop IP, buy VIP
3. Buy IP, develop VIP
4. Develop own IP and VIP
Since 70% of the effort is in the verification, developing your own verification IP does not provide any time or cost advantages. This leads us to eliminate model 3 and 4 from this discussion.The big assumption here is that a Verification IP is available, is of high quality and complete - not just a BFM for which you will need to scramble together the test bench yourself. (Where can you find such a solution? Here is a good place to start).
Given some real trade-offs between models 1 and 2, let us list out their advantages and disadvantages.
Related Semiconductor IP
- Multi-channel Ultra Ethernet TSS Transform Engine
- Configurable CPU tailored precisely to your needs
- Ultra high-performance low-power ADC
- HiFi iQ DSP
- CXL 4 Verification IP
Related Blogs
- Exploring USB Applications and the Impact of USB IP
- Demystifying the Qualification Process for Automotive Certification: ISO 26262 Compliance for CSI IP Products and Reliability Testing
- Quantum Safe IP: Hardware Level Security for the Quantum Computing Era
- Revolutionizing Display Technology with VESA Display Stream Compression (DSC) Decoder IP
Latest Blogs
- AI is stress-testing processor architectures and RISC-V fits the moment
- Rambus Announces Industry-Leading Ultra Ethernet Security IP Solutions for AI and HPC
- The Memory Imperative for Next-Generation AI Accelerator SoCs
- Leadership in CAN XL strengthens Bosch’s position in vehicle communication
- Validating UPLI Protocol Across Topologies with Cadence UALink VIP