Agile Analog 为 RISC-V International提供模拟 IP
By Jean-Pierre Joosting, eeNews Embedded (July 20, 2021)
As a strategic member, Agile Analog expects to widen access to its application- and process-optimised analog IP for smart and IoT devices.
Agile Analog, a supplier of highly configurable process node-agnostic analog IP building blocks, has been accepted as a strategic member by RISC-V International, the non-profit organisation which maintains RISC-V as a free and open processor instruction set architecture (ISA).
Increasing numbers of OEMs and manufacturers of SoCs and ASICs are choosing to base complex chip designs on the RISC-V architecture, as its open licence business model enables them to develop chip designs faster and to enjoy greater design flexibility than is possible when using proprietary processor architectures.
Related Semiconductor IP
- RISC-V Vector Extension
- RISC-V Real-time Processor
- RISC-V High Performance Processor
- 32b/64b RISC-V 5-stage, scalar, in-order, Application Processor. Linux and multi-core capable. Maps upto ARM A-35. Optimal PPA.
- 32 Bit - Embedded RISC-V Processor Core
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