Secure crypto coprocessor IP

NIST CAVP certified and OSCCA standard compliant crypto engine suite
Includes private/public key ciphers, message authentication code, hashes, and key derivation
Key wrapping function for the secure export of keys
Public-key coprocessor for digital signatures and key agreements over elliptic/Edward curves

Comprehensively support all CPU architectures
Crypto engine collective, consisting of private key cipher, message authentication code, hash, and key derivation functions that are NIST CAVP certified and OSCCA standards compliant
Key wrapping function aiding the export of keys for external use

The RT-64x Embedded Hardware Security Module (Root of Trust) family are fully programmable, ISO 26262 ASIL-B hardware security cores offering security by design for automotive applications.
They protect against a wide range of failures such as permanent, transient and latent faults and hardware and software attacks with state-of-the-art anti-tamper and security techniques.

Custom-designed 32-bit RISC-V secure processor
Security model include hierarchical privilege model, secure key management policy, hardware-enforced isolation/access control/protection, error management policy
Standard hardware cryptographic accelerators, including AES (all modes), HMAC, SHA-2 (all modes), RSA up to 4096 bits, ECC up to 521 bits, a NIST-compliant Random Bit Generator, AXI Multi Issue Out-of-Order, and Fast DMA capability. Additional algorithms such as Whirlpool (SHE), SHA-1 (legacy), AES-CMAC, SHA-3, Poly1305, ChaCha and OSCCA SM2-3-4 are available
Multi-layered security model protects all core components against a wide range of attacks

Custom-designed 32-bit secure RISC-V processor
Multi-layered security model protects all core components against a wide range of attacks
Security model includes hierarchical privilege model, secure key management policy, hardware-enforced isolation/access control/protection, error management policy
State-of-the-art DPA resistance, FIA protection and anti-tamper techniques

Built-in standard APB controller with privilege control to create secure/non-secure separation. Additionally, interface customization is available for different design requirements.
Four 256-bit hardware PUF chip fingerprints, include a self-health check that can be used as a unique identification(UID) or a root key(seed).
High-quality true random number generator (TRNG)
8k-bit mass production OTP with built-in instant hardware encryption (customization available)

secure crypto coprocessor IP