eUSB IP

Filter
Filter

Login required.

Sign in

Login required.

Sign in

Login required.

Sign in

Compare 27 IP from 8 vendors (1 - 10)
  • Simulation VIP for eUSB
    • Supported DUT Types
    • All eUSB DUT types such as in native mode: Host(eDSPn) or Device(eUSPn), in Repeater Mode: Host(eDSPr) or Device(eUSPr), Host Repeater, Peripheral Repeater and Hybrid Repeater.
    • Transaction Types
    • All types of transfers: bulk, control, interrupt, and isochronous transactions
  • eUSB Verification IP
    • eUSB
    • Compatible with Embedded USB2 (eUSB2) Physical Layer Supplement to the USB Revision 2.0 Specification Rev.1.1.
    • Fully compliant to the USB2.0 layer architecture with the following features:
    • Supports high-speed, full-speed, and low-speed operation.
    Block Diagram -- eUSB Verification IP
  • USB2.0 PHY(HSIC/Host/Device/OTG/Hub)/ eUSB PHY
    • USB is the ubiquitous interconnect standard of choice for a wide range of computing and consumer applications
    • Innosilicon provides a comprehensive set of software drivers to support commonly used USB peripherals
    • In addition, our established USB ecosystem—comprising USB silicon suppliers, design IP houses, and verification and testing vendors—helps reduce development and production costs for USB host and peripheral manufacturers
    Block Diagram -- USB2.0 PHY(HSIC/Host/Device/OTG/Hub)/ eUSB PHY
  • Block Diagram -- eUSB 3.1 Gen 2 Device Controller - Software Enumeration, FIFO Interface
  • eUSB 2.0 PHY - TSMC N5 x1, North/South (vertical) poly orientation
    • Designed for 7nm processes and below
    • Supports the USB 2.0 protocol and High Speed, Full Speed, and Low Speed data rates
    • eUSB2 PHYs supports USB 2.0, 3.0, 3.1 and 3.2 Device, Host and Dual Role configurations
    Block Diagram -- eUSB 2.0 PHY - TSMC N5 x1, North/South (vertical) poly orientation
  • eUSB 2.0 PHY - TSMC N4P x1, North/South (vertical) poly orientation
    • Designed for 7nm processes and below
    • Supports the USB 2.0 protocol and High Speed, Full Speed, and Low Speed data rates
    • eUSB2 PHYs supports USB 2.0, 3.0, 3.1 and 3.2 Device, Host and Dual Role configurations
    Block Diagram -- eUSB 2.0 PHY - TSMC N4P x1, North/South (vertical) poly orientation
  • eUSB 2.0 PHY - TSMC N3P x1, North/South (vertical) poly orientation
    • Designed for 7nm processes and below
    • Supports the USB 2.0 protocol and High Speed, Full Speed, and Low Speed data rates
    • eUSB2 PHYs supports USB 2.0, 3.0, 3.1 and 3.2 Device, Host and Dual Role configurations
    Block Diagram -- eUSB 2.0 PHY - TSMC N3P x1, North/South (vertical) poly orientation
  • eUSB 2.0 PHY - TSMC N3E x1, North/South (vertical) poly orientation
    • Designed for 7nm processes and below
    • Supports the USB 2.0 protocol and High Speed, Full Speed, and Low Speed data rates
    • eUSB2 PHYs supports USB 2.0, 3.0, 3.1 and 3.2 Device, Host and Dual Role configurations
    Block Diagram -- eUSB 2.0 PHY - TSMC N3E x1, North/South (vertical) poly orientation
  • eUSB 2.0 PHY in TSMC (N5, N4P, N3E, N3P)
    • Compliant with eUSB2 specification rev 1.1
    • Can be used in USB Host, Device, and Dual Role applications
    • eUSB2 PHY and eUSB2 repeater supports USB 2.0 480Mbps (High Speed), 12Mbps (Full Speed) and 1.5Mbps (Low Speed) data rates
    • eUSB2 PHY designed for the most advanced process nodes that does not support 3.3V signaling and 5V tolerance
  • Simulation VIP for eUSB2V2
    • The Verification IP (VIP) for eUSB2v2 is a complete VIP solution for the embedded USB2 (eUSB2) Version 2.0.
    • It provides a mature and comprehensive verification IP (VIP) for the eUSB2v2 protocol.
    • Incorporating the latest protocol updates, the eUSB2v2 VIP is not only a complete bus functional model (BFM) for the eUSB2v2 DUT, but it also provides integrated automatic protocol checks and coverage models.
    Block Diagram -- Simulation VIP for eUSB2V2
×
Semiconductor IP