Risc-v processor IP

Compare 154 IP from 37 vendors (1 - 10)

Configurable RISC-V processor IP core
- The NOEL3 is a configurable RISC-V processor IP core, described in VHDL.
- The architecture is designed to utilize a small area footprint and to maintain execution predictability.
32 Bit - Embedded RISC-V Processor Core
- Best-in-class performance for small-area and low-power applications
- Highly configurable and easy and quick to customize and verify
- Process compliant with ISO 26262 and ISO 21434
ARC-V RHX-100 dual-issue, 32-bit single-core RISC-V processor for real-time applications
- High-speed, 32-bit, dual-issue, 10-stage pipeline
- Multicore support for up to 16 CPUs and up to 16 user hardware accelerators per processor cluster
ARC-V RMX-100 ultra-low power 32-bit RISC-V processor for embedded applications
- 32-bit RISC-V embedded CPU with balanced 3-stage pipeline
- DSP implementation to extend the RISC-V baseline (RMX-100D)
- 2 KB to 64 KB instruction L1 cache
- Up to 2MB instruction and data closely coupled memory (CCM)
ARC-V RHX-105 dual-issue, 32-bit RISC-V processor for real-time applications (multi-core)
- High-speed, 32-bit, dual-issue, 10-stage pipeline
- Multicore support for up to 16 CPUs and up to 16 user hardware accelerators per processor cluster
ARC-V RMX-500 power efficient 32-bit RISC-V processor for embedded applications
- 32-bit RISC-V embedded CPU with a 5-stage pipeline
- DSP implementation to extend the RISC-V baseline (RMX-500D)
- 2 KB to 64 KB instruction & data L1 caches
Low-Power Deeply Embedded RISC-V Processor
- The BA53 is a configurable, low-power, deeply-embedded RISC-V processor IP core.
- It implements a single-issue, in-order, 5-stage execution pipeline, and supports the RISC-V 32-bit base integer instruction set (RV32I), or the 32-bit base embedded instructions set (RV32E).
32-bit RISC-V processor specifically designed for the Automotive and Functional Safety markets
- 32-bit RISC-V ISA
- ASIL B and ASIL D area optimised product variants
- Functional Safety Package and Independent Assessment
RISC-V Processor With Posits
- CPU Core built by integrating PNU with 64-bit RISC-V Processor
32 Bit - Embedded RISC-V Processor Core
- 32 bit,
- 3-stage pipeline,
- 32 registers

RISC-V processor IP