I2C Slave Controller IP
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69
IP
from 24 vendors
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I2C Slave Controller w/FIFO (AHB Bus)
- Implements Slave-only protocol for smaller VLSI footprint, for applications requiring Slave–Receiver and Slave–Transmitter capability
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I2C Slave Controller w/FIFO (APB Bus)
- Implements Slave-only protocol for smaller VLSI footprint, for applications requiring Slave–Receiver and Slave–Transmitter capability
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I2C Slave Controller w/FIFO (AXI Bus)
- I2C Slave Controller - Implements Slave-only protocol for smaller VLSI footprint, for applications requiring Slave–Receiver and Slave–Transmitter capability
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I2C Slave Controller - Low Power, Low Noise Config with APB Interface
- I2C Slave Controller - Implements Slave-only protocol for smaller VLSI footprint, for applications requiring Slave–Receiver and Slave–Transmitter capability
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I2C Slave Controller w/FIFO (APB or AHB or AHB-Lite or AXI-Lite Bus)
- I2C Slaver only with Parameterized FIFO:
- Targets embedded processors with high performance algorithm requirements, by independently controlling the Transmit or Receive of bytes of information.
- Small VLSI footprint
- Slave Controller Modes:
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I2C Slave Controller - Low Power, Low Noise Config of User Registers
- Low Power
- Low Noise Config of User Registers
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I2C Slave Controller with User Register Array / Memory / FIFO / AMBA Interface
- I2C Slave Controller - Implements Slave-only protocol for smaller VLSI footprint, for applications requiring Slave–Receiver and Slave–Transmitter capability
- Autonomous I2C Slave Controller:
- 7- or 10-bit I2C Slave addressing, SCL Low Wait States
- Supports five I2C bus speeds:
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I2C Bus Master / Slave Controller Interface with FIFO
- Conforms to v.3.0 of the I2C specification
- Master mode
- Master operation
- Master transmitter
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I2C Master / Slave Controller w/FIFO (APB Bus)
- I2C Master / Slave with Parameterized FIFO: