GPIO IP
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283
IP
from 43 vendors
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10)
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Generic GPIO controller
- General Purpose I/O pins are used for system control and connection of various devices.
- This (GPIO) controller provides dedicated general-purpose pins that can be configured as either inputs or outputs.
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1.8V to 5V GPIO, 1.8V to 5V Analog in TSMC 180nm BCD
- A Flip-Chip compatible I/O Library in TSMC 180nm BCD with 1.8V to 5V GPIO, 1.8V to 5V analog, with ultra low-cap/low-leakage RF solutions.
- This silicon proven flip-chip compatible library in TSMC 180nm BCD features a multi-voltage GPIO, 1.8V to 5V analog I/O, and ultra-low capacitance and low leakage 36V+ ESD solutions. The library also includes 5V RF pads.
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1.8V/3.3V GPIO Library with HDMI, Aanlog & LVDS Cells in TSMC 22nm
- A TSMC 22nm Inline, Flip Chip compatible library with GPIO, ODIO, HDMI, LVDS, & Analog Cells.
- This silicon-proven, flip chip compatible library in TSMC 22nm boasts a two speed GPIO: 75MHz and 150MHz.
- The library also features a 5V ODIO. GPIO and ODIO cells have an orientation of NS and EW.
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1.8V GPIO, 1.8V to 3.3V Analog in TSMC 180nm BCD
- A Flip-Chip compatible I/O Library in TSMC 180nm BCD with 1.8V GPIO, 1.8V to 3.3V Analog, with ultra low-cap/low-leakage 36V+ ESD solutions.
- This silicon proven flip-chip compatible library in TSMC 180nm BCD features a 1.8V GPIO, 1.8 to 3.3V analog I/O, and ultralow capacitance and low leakage 36V+ ESD solutions.
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Multi-Voltage GPIO 5V ODIO and Analog/RF I/Os in TSMC 65nm
- Key attributes of this IO library include dual independent IO supply rails (1.0V-3.3V 3.3V) and power-on-control (POC) to place IOs in HiZ during power-down.
- The GPIO cell can be configured as input, output or open-drain with a Schmitt trigger input and optional internal 55K ohm pull-up or pull-down resistor.
- Cells for two independent IO supplies, core power, ground and isolated ground with built-in ESD are included.
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1.8V/3.3V GPIO Compliant with Multiple Standards in TSMC 16nm
- This library is a high-voltage GPIO I/O Macro in TSMC 16nm.
- The high-voltage GPIO is a flip-chip compatible 1.8V to 3.3V GPIO design, compliant with multiple I/O standards.
- It comes as a macro cell with a pair of I/Os in each cell, allowing differential I/O interface capabilities as well.
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1.2V/1.8V GPIO Compliant with multiple standards in TSMC 16nm
- This library is a production-quality, silicon-proven I/O Library in TSMC 16nm technology.
- The High Performance GPIO is a flip-chip compatible, 1.2V to 1.8V GPIO design, compliant with multiple high-speed Single-Ended and Differential I/O standards.
- The macro cell comes as a pair of I/Os that can be configured as a differential I/O or two independent single- ended I/Os.
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1.8V/3.3V Multi-Voltage GPIO in TSMC 28nm
- This silicon-proven TSMC 28nm Digital I/O Library delivers a high-performance, low-power interface solution designed for advanced digital applications.
- Featuring a triple-staggered architecture, this versatile library supports multi-voltage and multi-protocol GPIO, ensuring seamless integration across diverse system requirements.
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1.8V/3.3V Switchable GPIO in TSMC 28nm
- A TSMC 28nm Wirebond I/O Library with a switchable 1.8V/3.3V GPIO, with Specialized RF Wirebond Cells for LNAs.
- A key attribute of this silicon-proven, inline library is to detect and adjust to a VDDIO supply of 1.8V or 3.3V during system operation.
- The GPIO can be configured as input, output, open-source, or open-drain with an optional 60kohm pull-up or pull-down resistor.
