High Performance Single-Ended / Differential I/O Macro in TSMC 16FFC
This library is a production-quality, silicon-proven I/O Library in TSMC 16nm technology. The High Performance GPIO is a flip-chip compatible, 1.2V to 1.8V GPIO design, compliant with multiple high-speed Single-Ended and Differential I/O standards. The macro cell comes as a pair of I/Os that can be configured as a differential I/O or two independent single- ended I/Os. The library is capable of tuned output impedance when paired with our calibration I/O that adaptively tunes to an external precision resistor.
Operating Conditions
| Parameter | Value |
| Devices | 1.8V Thick and 0.8V Thin Oxides |
| BEOL | 11 Metals |
| VDDIO | 1.2V, 1.5V, and 1.8V |
| VDD | 0.8V |
| Tj | -40C to 125C |
| ESD | +/- 2kV HBM, +/- 500V CDM |
Cell Names
| Cell Size | Metal Stack |
| RS_HPIO_DIF_NS | Pair of Digital GPIO, 70x75um |
| RS_HPIO_DIF_EW | Pair of Digital GPIO, 70x75um |
Single-Ended Standards
- LVCMOS: 2mA, 4mA, 6mA, 8mA, 12mA and 16mA
- HSTL: Class 1 & 2
- SSTL: Class 1 & 2
- HSUL
- POD
Differential Standards
- LVDS
- DIFF_HSUL
- DIFF_POD
- SLVS
- MIPI
