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Search (28)
Compare 28 IP from 12 vendors (1 - 10)
  • DVB-T Modulator
    • Fully synchronous design, using single clock
    • Fully synthesizable drop-in module for FPGAs
  • DVB-T2 Rx Bit Chain
    • Short and Long Frames
    • SISO
    • Flexible channel BW (1.7, 5, 6, 7, 8, and 10) MHz
    • Flexible modulation (QPSK, 16QAM, 64QAM, and 256QAM)
    • Flexible FFT size (1, 2, 4, 8, 16, and 32) K
    • Flexible guard interval (1/128, 1/32, 1/16, 19/256, 1/8, 19/128, and 1/4)
  • DVB-T2 Demodulator and LDPC/ BCH Decoder
    • DVB-T2 EN302 755 V1.2.1, Rev.9 compliant  
    • Supports IF input  
    • Single input – Single output (SISO)  
    • Sampling frequency offset (SFO) tracking and compensation  
    • Carrier frequency offset (CFO) detection and correction  
  • DVB-T2/T Demodulator and Decoder IP (Silicon Proven)
    • DVB-T2 with T2-base profile of ETSI EN- 302755 v1.3.1,DTG7 v3 and Nordig Unified v2.4 compliant, 1.7-5-6-7 and 8 MHz normal and extended BW signals supported, GS streams, FEF and MISO supported
    • DVB-T demodulator: Compliant with ETSI EN-300744 v1.5.1, DTG7 v3 and Nordig Unified v2.4 compliant, 6-7 and 8 MHz BW supported
    • DVB-T/T2 compatible with zero-high- and legacy-IF tuners (CAN or silicon)
    • Embedded microcontroller (DVB-T2 task sequencing by firmware and monitoring)
    Block Diagram -- DVB-T2/T Demodulator and Decoder IP (Silicon Proven)
  • DVB-T2 Modulator
    • ETSI, DVB-T2 (EN 302 755 V1.1.1) Compliant baseband transmitter for second generation Digital Terrestrial Television broadcasting system
    Block Diagram -- DVB-T2 Modulator
  • DVB-T/H Modulator - RF output with AD9789 DAC
    • ETSI, DVB-T/H (EN 300 744 V1.5.1) compliant baseband transmitter for Digital Terrestrial Television
    • • Supported FPGA families: Xilinx Spartan-6, Virtex-6, Artix-7, Kintex-7, Virtex-7, Zynq
    • • Single clock
    • • Robust SPI input (discarding of incorrect input packets)
    Block Diagram -- DVB-T/H Modulator - RF output with AD9789 DAC
  • DVB-T2 Demodulator
    • This design is a DVB-T2 OFDM demodulator, supplied as portable and synthesizable Verilog-2001 IP.
    • The system was designed to be used in conjunction with a standard RF tuner.
    • QAM signal constellations are supported, including QAM16, QAM64 and QAM256 . QPSK, and BPSK also supported. 
    Block Diagram -- DVB-T2 Demodulator
  • LDPC Decoder and Encoder that supports DVB-S2 DVB-S2X DVB-T2 DVB-C2 CMMB DMB-T
    • LDPC decoder and encoder that supports several standards:
    • Versions available for different throughput, up to several Gbps.
    • Unique architecture assures easy place and rout.
  • DVB-T2 modulator
    • 1k, 2k, 4k, 8k, 16k and 32k OFDM.
    • BPSK, QPSK, QAM-16, QAM-64 and QAM-256 support.
    • Variable 1·7-10MHz bandwidth interpolation.
    • Automatic L1 field padding and puncturing.
    Block Diagram -- DVB-T2 modulator
  • DVB-T2 LDPC+BCH decoder
    • I/Q demapping (BPSK, QPSK, 16QAM, 64QAM and 256QAM)
    • Bit deinterleaver (16,64 and 256 QAMs)
    • inner LDPC decoding
    • outer BCH decoding
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Semiconductor IP