DVB-T2 Modulator

Overview

The DVB-T2 core allows the transmission of an MPEG-TS data stream to a digital to analog converter in base band, IF or RF mode.
The core is DVB T2 (ETSI EN 302 755 V1.1.1) compliant and support most of the standard parameters settings.

The core was developed in RTL VHDL in order to be implemented in any kind of FPGA programmable logic components.

The MVD DVB-T2 modulator core is delivered for baseband output to be natively connected to AD9789 DAC from Analog Device but can be used in Intermediate Frequency application or in RF application when respectively connected to our UPSAMPLER or our UPCONVERTER core (for Analog Devices (AD9739A) or Maxim RF DACs (MAX5881))

Key Features

  • ETSI, DVB-T2 (EN 302 755 V1.1.1) compliant baseband transmitter for second generation Digital Terrestrial Television broadcasting system
  • Drop-in module for Spartan™-6, Virtex™-6, Artix™-7, Kintex™-7, Virtex™-7 FPGAs and Zynq™
  • Dual clock (1x,2x), DAC synchronized required
  • (up to 150 MHz for 1x Clock and for Kintex family)
  • Robust SPI input (discarding incorrect input packets)
  • PCR re-stamping
  • Single PLP
  • Single channel
  • -------- Signalization Channel:-------
  • Programmable BPSK, QPSK, 16-QAM and 64-QAM Symbol Mapping
  • Guard Interval (1/2)
  • -------- Data Channel (PLP): --------
  • TS data only
  • Normal Mode or High Efficiency Mode
  • PLP type 1 only
  • Programmable QPSK, 16-QAM, 64-QAM and 256-QAM Symbol Mapping
  • Constellation Rotation
  • OFDM modes (1K, 2K, 4K, 8K, 16K, 32K)
  • Extended Carrier mode
  • Guard Interval (1/4, 1/8, 1/16, 1/32 - 1/128, 19/128, 19/256)
  • Channel width from 5 MHz to 8 MHz
  • Baseband outputs (2 x 16 bits) @ Fsymbol rate
  • Fully synthesizable RTL VHDL design (not delivered) for easy customization
  • Design delivered as Netlist
  • MER > 40 dB

Block Diagram

DVB-T2 Modulator Block Diagram

Applications

  • The MVD DVB-T2 modulator may be used to broadcast a high rate stream (HD or 3D for example) or a multiplexed stream with many services.
  • The standard allows choosing from a strongly robust stream to a very high data bitrate stream.

Deliverables

  • Datasheet
  • Netlist for core generation
  • VHDL top file
  • VHDL source code: can be delivered as an option under NDA and other specific clauses

Technical Specifications

Availability
April 2015
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Semiconductor IP