I/O Library IP for UMC
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I/O Library IP
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425
I/O Library IP
for UMC
from 9 vendors
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5MHz-35MHz Low Power Crystal Oscillator - TSMC 0.18µ
- 4MHz-35MHz Frequency range.
- No external bias or limit resistors required.
- Current optimization for best power at frequency.
- Amplitude control loop.
- The OSCI pad input can be used as a CMOS input for test.
- Uses single 1.8V supply.
- Enable/power down provision.
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LVDS interfaces
- Wide operating range
- High data rates
- Very flexible programmability
- Excellent signal integrity
- TIA/EIA644A LVDS and sub-LVDS compatibility
- Receiver also compatible with LVPECL
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1.25 Gbps 4-Channel LVDS Deserializer in Samsung 28FDSOI
- 25-180 MHz clock support
- Up to 1.25 Gbps bandwidth
- Up to 5.0 Gbps data throughput
- Full Low power CMOS design
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666 Mbps LVDS Transceiver IP
- 666 Mbps operation per channel
- Low power dissipation
- No external components
- Integrated termination resistors in transmitter and receiver.
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LVDS TX+ (Transmitter) in UMC 40LP
- Compatible with TIA/EIA-644 LVDS Standard
- 49 Mbps - 770 Mbps bandwidth/channel
- Up to 3.08 Gbps data throughput
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Camera 6/7-mode Combo Receiver - 1G/1.5Gbps
- The CL12684KM4-8-12-16R3AM6-7ZIP is an ideal means to link Camera Modules or CMOS Image Sensor (CIS) to Host System.
- The CL12684KM4-8-12-16R3AM6-7ZIP is designed to support data rate in excess of maximum 1Gbps utilizing sub-LVDS / mini-LVDS / LVDS / HiSPi(SLVS-400, HiVCM) / MIPI-DPHY / CMOS-1.8V / CMOS-3.3V interface specification.
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on-chip ESD protection
- Analog I/Os
- ESD Power protection
- Ground pads
- ESD protection cells
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LCD Host LVDS Interface, Dual Pixel 20-112Mhz (SVGA/QXGA)
- 1P6M layout structure based on 0.18um 1P6M 1.8V generic logic process.
- 3.3V/1.8V ±10% supply voltage, -40/+125°C
- Complies with OpenLDI specification for digital display interfaces and LVDS IEEE Standard 1596.3-1996+ ANSI/TIA/EIA-644-A Specifications.
- Up to 5.38Gbps bandwidth
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High voltage tolerant I/O
- Scalable robustness
- Area efficient
- low capacitance option
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Analog I/O - low capacitance, low leakage
- Scalable robustness
- Area efficient
- low capacitance option