I/O Library IP for UMC

Compare 427 I/O Library IP for UMC from 9 vendors (1 - 10)

5MHz-35MHz Low Power Crystal Oscillator
- 4MHz-35MHz Frequency range.
- No external bias or limit resistors required.
- Current optimization for best power at frequency.
LVDS TX+ (Transmitter) in UMC 40LP
- Compatible with TIA/EIA-644 LVDS Standard
- 49 Mbps - 770 Mbps bandwidth/channel
- Up to 3.08 Gbps data throughput
1.25 Gbps 4-Channel LVDS Deserializer in Samsung 28FDSOI
- 25-180 MHz clock support
- Up to 1.25 Gbps bandwidth
- Up to 5.0 Gbps data throughput
- Full Low power CMOS design
666 Mbps LVDS Transceiver IP
- 666 Mbps operation per channel
- Low power dissipation
- No external components
- Integrated termination resistors in transmitter and receiver.
High voltage tolerant I/O
- Scalable robustness
- Area efficient
- low capacitance option
Analog I/O - low capacitance, low leakage
- Scalable robustness
- Area efficient
- low capacitance option
on-chip ESD protection
- Analog I/Os
- ESD Power protection
- Ground pads
- ESD protection cells
On-chip protection against IEC61000-4-2 events
- Analog Pads
- Power Pads
- Ground Pads
HSTL I/O Pad Set
- • Mode select – 1.5V or 1.8V operation
- • Single-ended and differential signaling
- • HSTL capability
- o Standard HSTL (1.5V) and expanded HSTL (1.8V)
General-Purpose I/O (GPIO) - 1.5V-1.8V
- ? Multi-Voltage (1.2V, 1.5V, 1.8V)
- ? LVCMOS / LVTTL input with selectable hysteresis
- ? Programmable drive strength (rated 2mA to 12mA)
- ? Selectable output slew rate