IP for TSMC

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Compare 16 IP for TSMC from 1 vendors (1 - 10)
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  • 2nm
  • PVT Sensor on TSMC CLN2P
    • The PVT Sensor is a highly integrated macro for monitoring process, voltage, and temperature variation on-chip, allowing very high precision even in untrimmed usage.
    • It consumes very little power even in operational mode, and leakage power only when temperature measurement is complete.
    Block Diagram -- PVT Sensor on TSMC CLN2P
  • Core Powered Wide Range Programmable Integer PLL on TSMC CLN2P
    • Electrically Programmable PLL with Fractional-N divide and Spread Spectrum Clock Generation
    • Entirely core voltage powered, needs no analog supply voltage
    • Wide Ranges of Input and Output Frequency for diverse clocking needs
    • Very fine precision: near 1 part per billion resolution
    Block Diagram -- Core Powered Wide Range Programmable Integer PLL on TSMC CLN2P
  • 18-40MHz Crystal Oscillator on TSMC CLN2P
    • Crystal Oscillator pad macro that supports industry standard crystals
    • Uses standard CMOS transistors
    • Crystal Oscillation Mode: Fundamental
    • Power down option for IDDQ testing
    Block Diagram -- 18-40MHz Crystal Oscillator on TSMC CLN2P
  • Power Supply Glitch Detector on TSMC CLN2P
    • Integrated voltage reference for precision stand-alone operation
    • Easy to integrate with no additional components or special power requirements
    • Easy to use and configure
    • Cascadable up to 4 additional glitch detection channels
  • Power Supply Droop Detector on TSMC CLN2P
    • Integrated voltage reference for stand-alone operation
    • Easy to integrate with no additional components or special power requirements
    • Easy to use and configure
    • Programmable droop detection levels
  • PCIe Gen4/5/6 Class Low Jitter LC PLL on TSMC CLN2P
    • High performance design emphasis for meeting low jitter requirements in PCIe Gen4 & Gen5 applications
    • Implemented with Analog Bits’ proprietary LC architecture
    • Low power consumption
    • Spread Spectrum Clock Generation (SSCG) and tracking capability
  • Multi Rail LDO for SERDES on TSMC CLN2P
    • Easy to integrate with no special power requirements
    • Easy to use and configure
    • Programmable output level
    • Trimming supported using 4-bit control
  • LDO for CPU Cores on TSMC CLN2P
    • Integrated voltage reference for precision stand-alone operation
    • Easy to integrate with no additional components or special power requirements
    • Easy to use and configure
    • Scalable for multiple output currents
  • Integrated Bandgap and Current Reference on TSMC CLN2P
    • Easy to integrate with no additional components or special power requirements
    • Easy to use and configure
    • Low power consumption
    • Implemented with Analog Bits’ proprietary architecture
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Semiconductor IP