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AES IP for TSMC

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Compare 6 AES IP for TSMC from 1 vendors (1 - 6)
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  • 7nm
  • High speed low latency AES-GCM pipeline, 100Gbps
    • The AES-IP-61 (EIP-61) is IP for accelerating AES-GCM based cryptographic solutions.
    • Designed for easy integration and very high performance the AES-IP-61 crypto accelerator provide a reliable and cost-effective embedded IP solution that is easy to integrate into high-speed processing pipelines.
    Block Diagram -- High speed low latency AES-GCM pipeline, 100Gbps
  • AES “All Modes” Accelerators
    • The AES-IP-39 (EIP-39) is IP for accelerating the AES symmetric cipher algorithm (FIPS-197), supporting all NIST modes including ECB, CBC, CTR, CFB, OFB, CCM, GCM, CBC-MAC, CMAC, XTS, F8, F9 modes of operation up to 6.4 Gbps @ 1GHz.
    • Designed for fast integration, low gate count and full transforms, the AES-IP-39 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into security modules needing versatile crypto.
    Block Diagram -- AES “All Modes” Accelerators
  • AES XTS/GCM Accelerators
    • Wide bus interface
    • Basic AES encrypt and decrypt operations
    • Key sizes: 128, 192 and 256 bits
    • Key scheduling in hardware, allowing key, key size and 
direction changes every 13/15/17 clocks with zero impact 
on throughput
    • Hardware reverse (decrypt) key generation
    Block Diagram -- AES XTS/GCM Accelerators
  • AES Key Wrap Accelerators
    • Wide bus interface (128-bit data, 256-bit keys) or 32-bit register interface
    • Key/KEK sizes: 128, 192 and 256 bits
    • Includes key scheduling hardware
    • Supported modes: NIST AES Key Wrap
    • Memory interface for key, intermediate and result data storage up to 4096 bits 
(Maximum supported input data block size is 512 bytes) 

    Block Diagram -- AES Key Wrap Accelerators
  • AES ECB/CBC/CTR Accelerators
    • The AES-IP-36 (EIP-36) is IP for accelerating the AES symmetric cipher algorithm (FIPS-197), supporting ECB, CBC and CTR modes up to 12.8 Gbps @ 1GHz.
    • Designed for fast integration, low gate count and full transforms, the AES-IP-36 accelerator provides a reliable and cost-effective embedded IP solution that is easy to integrate into high speed crypto pipelines.
    Block Diagram -- AES ECB/CBC/CTR Accelerators
  • AES-GCM Multi-channel upto 2Tbps Crypto Accelerator
    • EXAMPLE CONFIGURATIONS
    • The SafeXcel-IP-63 has a scalable number of processing pipes and channels. It is available in different configurations, suitable for different applications to meet different gate count and throughput objectives.
    • • EIP-63a-c17-r
    • o single pipe, 17 channels, register based (no memories)
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