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LPDDR IP for TSMC

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Compare 13 LPDDR IP for TSMC from 3 vendors (1 - 10)
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  • 16nm
  • LPDDR4X multiPHY - TSMC16FFC18
    • Supports JEDEC standard LPDDR4X, LPDDR4, LPDDR3, DDR4, DDR3, and DDR3L (1.35V DDR3) SDRAMs
    • Support for data rates up to 4,267 Mbps (process dependent)
    • Designed for rapid integration with Synopsys Enhanced Universal DDR Memory/Protocol Controllers (uMCTL2/uPCTL2) for a complete DDR interface solution
    • PHY independent, firmware-based training using an embedded calibration processor
    Block Diagram -- LPDDR4X multiPHY - TSMC16FFC18
  • LPDDR4 multiPHY V2 - TSMC16FFC18
    • Supports JEDEC standard LPDDR4X, LPDDR4, LPDDR3, DDR4, DDR3, and DDR3L (1.35V DDR3) SDRAMs
    • Support for data rates up to 4,267 Mbps (process dependent)
    • Designed for rapid integration with Synopsys Enhanced Universal DDR Memory/Protocol Controllers (uMCTL2/uPCTL2) for a complete DDR interface solution
    • PHY independent, firmware-based training using an embedded calibration processor
    Block Diagram -- LPDDR4 multiPHY V2 - TSMC16FFC18
  • LPDDR4X multiPHY - TSMC 16FFC18 for Automotive, ASIL B Random, AEC-Q100 Grade 2
    • Supports JEDEC standard LPDDR4X, LPDDR4, LPDDR3, DDR4, DDR3, and DDR3L (1.35V DDR3) SDRAMs
    • Support for data rates up to 4,267 Mbps (process dependent)
    • Designed for rapid integration with Synopsys Enhanced Universal DDR Memory/Protocol Controllers (uMCTL2/uPCTL2) for a complete DDR interface solution
    • PHY independent, firmware-based training using an embedded calibration processor
    Block Diagram -- LPDDR4X multiPHY - TSMC 16FFC18 for Automotive, ASIL B Random, AEC-Q100 Grade 2
  • LPDDR5/4/4X PHY - TSMC 16FFC
    • Supports JEDEC standard LPDDR5X, LPDDR5, LPDDR4 and LPDDR4X SDRAMs
    • Support for data rates up to 6400 Mbps
    • Designed for rapid integration with Synopsys’ LPDDR5/4/4X controller for a complete DDR interface solution
    • DFI 5.0 controller interface
    Block Diagram -- LPDDR5/4/4X PHY - TSMC 16FFC
  • TSMC CLN16FFPLLLVT 16nm LPDDR5 PHY - 6400Mbps
    • Supports LPDDR5
    • DFI 5.1 compliant
    • Supports x4, x8 and x16 DRAMs
    • Up to 72 bits wide and up to 4 ranks
    Block Diagram -- TSMC CLN16FFPLLLVT 16nm LPDDR5 PHY - 6400Mbps
  • TSMC CLN16FFPLL 16nm LPDDR5 PHY - 6400Mbps
    • Supports LPDDR5
    • DFI 5.1 compliant
    • Supports x4, x8 and x16 DRAMs
    • Up to 72 bits wide and up to 4 ranks
    Block Diagram -- TSMC CLN16FFPLL 16nm LPDDR5 PHY - 6400Mbps
  • TSMC CLN16FFPGLLVT 16nm LPDDR5 PHY - 6400Mbps
    • Supports LPDDR5
    • DFI 5.1 compliant
    • Supports x4, x8 and x16 DRAMs
    • Up to 72 bits wide and up to 4 ranks
    Block Diagram -- TSMC CLN16FFPGLLVT 16nm LPDDR5 PHY - 6400Mbps
  • TSMC CLN16FFPGL 16nm LPDDR5 PHY - 6400Mbps
    • Supports LPDDR5
    • DFI 5.1 compliant
    • Supports x4, x8 and x16 DRAMs
    • Up to 72 bits wide and up to 4 ranks
    Block Diagram -- TSMC CLN16FFPGL 16nm LPDDR5 PHY - 6400Mbps
  • TSMC CLN16FFCLLLVT 16nm LPDDR5 PHY - 6400Mbps
    • Supports LPDDR5
    • DFI 5.1 compliant
    • Supports x4, x8 and x16 DRAMs
    • Up to 72 bits wide and up to 4 ranks
    Block Diagram -- TSMC CLN16FFCLLLVT 16nm LPDDR5 PHY - 6400Mbps
  • TSMC CLN16FFCLL 16nm LPDDR5 PHY - 6400Mbps
    • Supports LPDDR5
    • DFI 5.1 compliant
    • Supports x4, x8 and x16 DRAMs
    • Up to 72 bits wide and up to 4 ranks
    Block Diagram -- TSMC CLN16FFCLL 16nm LPDDR5 PHY - 6400Mbps
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