PCI Express IP for TSMC
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- 6nm
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PCIe 6.0 PHY, TSMC N6 x2 1.2V, North/South (vertical) poly orientation
- Supports the latest features of PCIe 6.x and CXL 3.x specifications
- Supports PAM-4 signaling and up to x16 lane configurations with bifurcation
- Delivers more power efficiency across channels with unique DSP algorithms
- Enables near zero link downtime with patent-pending diagnostic features
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PCIe 6.0 PHY, TSMC N6 x4 1.2V, North/South (vertical) poly orientation
- Supports the latest features of PCIe 6.x and CXL 3.x specifications
- Supports PAM-4 signaling and up to x16 lane configurations with bifurcation
- Delivers more power efficiency across channels with unique DSP algorithms
- Enables near zero link downtime with patent-pending diagnostic features
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PCIe 5.0 PHY, TSMC N6 x6, North/South (vertical) poly orientation
- Supports all required features of the PCIe® 5.0, 4.0, 3.1, 2.1, 1.1, PIPE, and CXL 1.0, 1.1, and 2.0 specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE) supporting more than 36dB channel loss
- Adaptive receiver equalizer with programmable settings
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PCIe 5.0 PHY, TSMC N6 x4, North/South (vertical) poly orientation
- Supports all required features of the PCIe® 5.0, 4.0, 3.1, 2.1, 1.1, PIPE, and CXL 1.0, 1.1, and 2.0 specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE) supporting more than 36dB channel loss
- Adaptive receiver equalizer with programmable settings
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PCIe 5.0 PHY, TSMC N6 x2, North/South (vertical) poly orientation
- Supports all required features of the PCIe® 5.0, 4.0, 3.1, 2.1, 1.1, PIPE, and CXL 1.0, 1.1, and 2.0 specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE) supporting more than 36dB channel loss
- Adaptive receiver equalizer with programmable settings
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PCIe 5.0 PHY, NCS,TSMC N6 x4, North/South (vertical) poly orientation
- Supports all required features of the PCIe® 5.0, 4.0, 3.1, 2.1, 1.1, PIPE, and CXL 1.0, 1.1, and 2.0 specifications
- x1, x2, x4, x8, x16 lane configurations with bifurcation
- Multi-tap adaptive and programmable Continuous Time Linear Equalizer (CTLE) and Decision Feedback Equalization (DFE) supporting more than 36dB channel loss
- Adaptive receiver equalizer with programmable settings
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PCIe Gen4 PHY, x2-lane, RC/EP, TSMC N6, 1.8V, N/S orientation
- Fully compliant with PCI Express Base 4.0, PCI Express Base 3.1, PCI Express Base 2.1 and PCI Express Base 1.1 electrical specifications
- Compliant with PIPE4.4.1 (PCIe) specification
- Supports all power saving modes (P0, P0s, P1, P2) defined in PIPE4.4.1 specification
- Supports L1 PM Substates with CLKREQ#
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PCIe 5.0 PHY NCS in TSMC (N7, N6, N5)
- Physical Coding Sublayer (PCS) block with PIPE interface
- Supports PCIe 5.0, 4.0, 3.1, 2.1, 1.1 encoding, backchannel initialization
- Lane margining at the receiver
- Spread-spectrum clocking (SSC)
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PCIe 4.0 LP PHY in
- Physical Coding Sublayer (PCS) block with PIPE interface
- Support PCIe 4.0, 3.1, 2.1, 1.1 encoding, backchannel initialization
- Lane margining at the receiver
- Spread-spectrum clocking (SRIS)
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PCIe 5.0 PHY in TSMC (16nm, 12nm, N7, N6, N5, N4P, N3E, N3P)
- Physical Coding Sublayer (PCS) block with PIPE interface
- Supports PCIe 5.0, 4.0, 3.1, 2.1, 1.1 encoding, backchannel initialization
- Lane margining at the receiver
- Spread-spectrum clocking (SSC)