Chiplet and D2D IP for TSMC

Compare 3 Chiplet and D2D IP for TSMC from 2 vendors (1 - 3)

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<4Gbps Low Power D2D Interface in TSMC 16nm & 28nm
- A <4Gbps, Wide I/O Compatible, Die to Die Interface in TSMC 16nm and 28nm.
- This silicon proven die to die interface includes IP in both TSMC 16nm FFC/FFC+ and 28nm HPM/HPC/HPC+.
- The I/O cells for both versions of the library are defined as TX only and RX only.
Low Power D2D Interface in TSMC 16nm FFC/FFC+
- This library is a production-quality, silicon-proven custom Die-to-Die high speed interface available in TSMC’s 16nm process.
- The I/O cell is bidirectional, has two modes of operation: standard full rail to rail swing, or a custom low noise pseudo-differential interface.
- The RX cells have a weak pull-down feature.
Chiplet Interconnect - Die-to-die interconnect IP solutions for advanced and standard packaging applications
- High data rate of 2–24 Gb/s
- Very low power of < 0.375 pJ/bit @ 2–16 Gb/s 0.5-V VDDQ
- Very low latency of < 2 ns PHY-to-PHY
- Support for 2:1, 4:1, 8:1, 12:1 and 16:1 serialization and deserialization ratios