Low Power D2D Interface in TSMC 16nm FFC/FFC+

Overview

A 600MBps Low Power Die-to-Die Interface in TSMC 16nm FFC/FFC+.

This library is a production-quality, silicon-proven custom Die-to-Die high speed interface available in TSMC’s 16nm process. The I/O cell is bidirectional, has two modes of operation: standard full rail to rail swing, or a custom low noise pseudo-differential interface. The RX cells have a weak pull-down feature.

  Operating Conditions

Parameter Value
Core Device FFC (0.8V)
I/O Device 1.8V
Core Uses SVT only
BEOL 2Xa1Xd_h (M5 below)
PAD Flipchip
Cell Size 50um x 50um
VDDCore 0.8V
Tj -40C to 125C


 Library Cell Summary

Cell Name Description
VX_HSIO Bidirectional I/O Cell

 Pin List

Pin Type
VDD Power
VSS Ground
DIN Input 0.8V
OE Input 0.8V
DOUT Output0.8V
IE Input 0.8V
PE Input 0.8V
BUMP OUT0.8V

Block Diagram

Low Power D2D Interface in TSMC 16nm FFC/FFC+ Block Diagram

Technical Specifications

TSMC
Pre-Silicon: 16nm
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Semiconductor IP