IP for Tower
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61
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for Tower
from 17 vendors
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eFPGA IP - 100% third party standard cells
- Every element of the eFPGA can be defined in numbers: logic cells, adaptive DSP (with and without FIR engine, add & mult size, amount), RAM (type and amount) and IOs.
- In addition, Menta eFPGA IP Cores being 100% standard cells based, multiple power / performances trade-off can be achieved based on customer requirements.
- The eFPGA IP Cores are provided as hard IPs (GDSII).
- Menta eFPGA IP Cores use standard cells, and as such integrate smoothly into any standard ASIC design flow. Designers use RTL as the input to our software Origami Programmer to generate the eFPGA program file (bitstream) and obtain accurate performance evaluation.
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Fractional-N Frequency Synthesizer PLL
- Wide functional range allows all frequencies in a system to be synthesized with one PLL macro
- Input & output frequency ranges greater than 1000:1
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Custom Regulated High Capacity Charge Pump
- On-Chip Supply Rail Extension
- Extends the headroom and performance range of other on-chip blocks and components
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Super Inductor IP
- High Inductor Q (10 to 50)
- High Inductor Bandwidth (2.5Ghz to 50Ghz)
- Stackable Design
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Revolutionaly Ultra Low Phase Noise RF Amplifier-LNA IP
- Revolutionary Ultra Low Phase Noise operation
- Ultra Low Power Operation
- RF front end sensitivity enhancement
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Revolutionary Ultra Low Phase Noise Driver IP
- Revolutionary Ultra Low Phase Noise operation
- Ultra Low Power Operation
- RF front end sensitivity enhancement
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CC-100IP-PI Power Integrity Enhancement IP
- Occupies the same on chip area as standard DCAPs with at least a 600X effective capacitance increase
- Up to a 36% Dynamic Power and RF Emissions Reduction
- On-Chip Cybersecurity Enhancement
- 25% Reduction in Capacitor ESL
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CC-100IP-RF Analog and RF Sensitivity Enhancement IP
- Enhances the Sensitivity of Analog and RF Frontend Receivers
- Enhances the PSRR od Analog and RF Frontend Receivers
- Occupies the same on chip area as standard DCAPs with at least a 600X effective capacitance increase
- Up to a 36% Dynamic Power and RF Emissions Reduction
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CC-100IP-MB Electric Vehicle Mileage Booster IP
- Extends EV Driving range by 10%
- Extends the driving and Biking Range of Electric Vehicles from 16 to 30 Miles
- Occupies the same on chip area as standard DCAPs with at least a 600X effective capacitance increase
- Up to a 36% Dynamic Power and RF Emissions Reduction
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Hyper-Decoupling Capacitor with a Capacitance Multiplication, Series Inductance Nullification, Cybersecurity Enhancement and an Energy Harvesting capabilities
- Occupies the same on chip area as standard DCAPs with at least a 600X effective capacitance increase
- Up to a 36% Dynamic Power and RF Emissions Reduction
- On-Chip Cybersecurity Enhancement
- 25% Reduction in Capacitor ESL
