12-Bit ADC IP for GLOBALFOUNDRIES

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Compare 27 12-Bit ADC IP for GLOBALFOUNDRIES from 10 vendors (1 - 10)
  • 12-bit 2GSPS Time Interleaved ADC
    • The WEAADC12BHSI22G is a 12-bit time interleaved Successive Approximation Analog-toDigital Converter (ADC) that supports both singleended and differential operation, depending on the input and reference connections
    • It integrates 13 WEAADC12BHS22G with programmable clock skew (50ps coarse 4ps fine with minimum step 0.25ps) and pre/post-calibration logic on each
    • Operating on a 0.8 V power supply, the WEAADC12BHSI22G can provide output up to 2GSPS in 13-interleaved mode
    • The ADC can be clocked with 2GHz clock
    Block Diagram -- 12-bit 2GSPS Time Interleaved ADC
  • 12-bit High Speed Analog to Digital Converter
    • The WEAADC12BHS22G is a 12-bit Successive Approximation Analog-to-Digital Converter (ADC) that supports both single-ended and differential operation, depending on the input and reference connections
    • It integrates a split-capacitor DAC with a built-in track-and-hold circuit, a dynamic comparator with DC-offset autocalibration, SAR logic state machine, and pre/post-calibration logic
    • The device also includes gain and offset calibration mechanisms
    • Operating on a 0.8 V power supply, the WEAADC12BHS22G requires 13 clock cycles for conversion, in 12-bit resolution mode, with digital data available at the rising edge of the 14th clock pulse
    Block Diagram -- 12-bit High Speed Analog to Digital Converter
  • 12-bit, 10 GSPS ADC - GlobalFoundries GF22FDX
    • 12-bit resolution
    • 10 GSPS sampling rate
    • 6 GHz Input Bandwidth
    Block Diagram -- 12-bit, 10 GSPS ADC - GlobalFoundries GF22FDX
  • Auxiliary ADC - 12-bit Successive Approximation Register (SAR) ADC
    • Silicon proven in 22, 28, 40, 55, 65, 110, 130, 180nm from SMIC, HHgrace, Global Foundries and Samsung
    • Resolution: 12-bit
    • Data Rate: 1Msps/200Ksps
    • DNL: ±1.5 LSB, INL: ±3 LSB
    Block Diagram -- Auxiliary ADC - 12-bit Successive Approximation Register (SAR) ADC
  • 12-bit Analog-to-Digital Converter
    • The agileADC 12 Analog-to-Digital Converter is a traditional Charge-Redistribution SAR ADC that is referenced to VDD, VSS. The architecture can achieve up to 12-bit resolution at sample rates up to 64 MSPS. It includes a 16-channel input multiplexor that can be configured to be buffered or unbuffered, and support differential or single-ended inputs.
    Block Diagram -- 12-bit Analog-to-Digital Converter
  • 12-bit 1-channel up to 1 MSPS low power SAR ADC
    • Global Foundries Embedded EEPROM 55nm
    • INL ±3LSB
    • DNL ±1LSB
    • SINAD 65dB@1MSPS
    Block Diagram -- 12-bit 1-channel up to 1 MSPS low power SAR ADC
  • Video ADC - 12-bit Successive Approximation Register (SAR) ADC
    • The analog-to-digital converter is a differential high speed low power IP which uses Successive Approximation Register (SAR) architecture to achieve 12-bit resolution.
    • The ADC includes a core internal SAR ADC which consists of sample/hold circuits, a capacitive DAC, a comparator and logic control circuits.
    • The ADC is designed with high dynamic performance for input signal frequencies up to Nyquist.
    • It is perfectly suitable for broadband communication applications.
    Block Diagram -- Video ADC - 12-bit Successive Approximation Register (SAR) ADC
  • Block Diagram -- Pipeline ADC
  • Block Diagram -- SAR ADC
  • 12-bit 40nm 1.1V 64MHz-to-340MHz continuous-time Delta-Sigma ADC
    • Integrated Dual-Channel Continuous-time Delta-Sigma Modulator (I + Q)
    • Integrated Dual decimate-by-8 Cascaded-Integrator-Comb Decimation Filter
    Block Diagram -- 12-bit 40nm 1.1V 64MHz-to-340MHz continuous-time Delta-Sigma ADC
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