PLL IP, Input: 10MHz - 200MHz, Output: 25MHz - 400MHz, UMC 0.13um SP/FSG process
Overview
Output frequency 25M~400MHz PLL, UMC 0.13um SP/FSG Logic process.
Technical Specifications
Foundry, Node
UMC 130nm SP/FSG
UMC
Pre-Silicon:
130nm
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