Low Power/Ultra Low Power Pseudo 2 Ports SRAM Compiler with Row/Column Redundancy Option, supports process GP/LP/LPEF/ULP/ULPEF
Overview
Memory Compilers
Technical Specifications
Foundry, Node
TSMC 55nm
Maturity
Avaiable
TSMC
Pre-Silicon:
55nm
FL
,
55nm
G
,
55nm
GP
,
55nm
LP
,
55nm
NF
,
55nm
ULP
,
55nm
ULPEF
,
55nm
UP
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