Low Power/Ultra Low Power Single Port Multi-banks SRAM Compiler with Row/Column Redundancy Option, with Low Leak support, short and long channel, inputs isolation, dual-rails, register scan, supports process GP/LP/LPEF/ULP/ULPEF
Overview
Memory Compilers
Technical Specifications
Foundry, Node
TSMC 55nm
Maturity
Silicon Proven
TSMC
Silicon Proven:
55nm
FL
,
55nm
G
,
55nm
GP
,
55nm
LP
,
55nm
NF
,
55nm
ULP
,
55nm
ULPEF
,
55nm
UP
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