IP Catalog > Analog IP > Clocking IP > PLL IP > General Purpose PLL IP > Input 200MHz~400MHz, output 200MHz~1600MHz frequency synthesizable PLL; UMC 28nm HPC Logic Process

Input 200MHz~400MHz, output 200MHz~1600MHz frequency synthesizable PLL; UMC 28nm HPC Logic Process

Overview

Input 200MHz~400MHz, output 200MHz~1600MHz frequency synthesizable PLL; UMC 28nm HPC Logic Process

Technical Specifications

Foundry, Node
UMC 28nm
UMC
Pre-Silicon: 28nm HLP , 28nm HPC , 28nm HPM , 28nm LP
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