I3C is a new a standard from the MIPI Alliance that unifies and
extends the legacy interfaces of I2C and SPI and adds new
powerful features to support modern mobile, automotive, and
IOT applications. The range of I3C products from Silvaco allows
customers to take full advantage of the high performance and
low power features of I3C V1.1.
I3C V1.1 Advanced Controller
Overview
Key Features
- Advanced I3C features
- HDR-BT with up to 100 Mbps bandwidth
- Multilane with 1, 2, or 4 SDA lanes
- Hot-join
- In-band interrupts
- Timing Control
- Asynchronous Mode 0
- Synchronous Mode
- High-speed mode (HDR-DDR)
- Group addressing
- Target reset
- All Common Command Codes (CCCs) supported
- AMBA APB (v3) application interface
- Memory mapped registers
- DMA, flow control features
- FIFO options
- Internal 2-byte ping-pong buffer
- Internal FIFO (or 32 words for HDR-BT mode)
- Legacy I2C coexistence, including I2C messaging
- Static I2C address support
- Support for I2C pads with 50ns glitch filter
Block Diagram
Applications
- IoT Edge Devices
- Industrial Sensors
- Small Controllers
- Mixed Signal Digital - MEMS
- Smart Sensors
- Smart Lighting
- Temperature, Pressure, Acceleration Monitors
- Personal Health Monitors
- I3C Connected Devices
Deliverables
- Verilog RTL source code
- Test bench with test suites
- Documentation including User's Guide and Integration Guide
- Technology-independent synthesis constraints
Technical Specifications
Maturity
Silicon Proven
Availability
Now
Related IPs
- I3C V1.1 Advanced Target
- I3C Master / Slave Controller w/FIFO (APB Bus)
- MIPI I3C Basic v1.1.1 specifications with Host Controller Interface v1.1 specification
- MIPI I3C Master v1.1 Controller IP offers impressive data transmission capacity for sensor integration.
- MIPI I3C Slave v1.1 Controller IP enables efficient data flow for sensor integration.
- LPDDR Secure Controller supporting LPDDR5, LPDDR4 and LPDDR4X with Advanced Features Package