10M/100M/1G/10G/25G Advanced Ethernet TSN Switch IP Core

Overview

Highly versatile, high performance advanced Ethernet Switch with an extensive set of QoS features and statistics.

The 10M/100M/1G/10G/25G Ethernet Switching IP is an advanced Ethernet TSN Switch IP with an extensive set of QoS features and statistics. The Comcores Ethernet TSN Switch IP supports up to 8 queues, classification, VLAN 802.1Q, multicast and broadcast as well as IEEE 1588 transparent clock. Each port provides a native interface for Ethernet PHY devices. IEEE 802.1 Protocol Implementation Conformance Statement is available, specifying exact feature-set.

The Ethernet TSN Switch IP provides support for key TSN features including IEEE 802.1Qbu and 802.3br Frame preemption, 802.1Qbv Time aware shaping, 802.1Qav Credit based shaping, 802.1Qci Per-Stream Filtering and Policing, and 802.1CB Frame replication and elimination for reliability. This enables the use of the IP in high speed time-critical applications.

Key Features

Delivers Performance
- Up to 800Gbps switching capacity
- Parallel Lookup Engines enable high packet processing rate
- CPU packet port up to 25 Gbps
- QoS features including classification, queuing and scheduling
- Supports VLAN, Supports IGMP snooping
- Supports Rapid Spanning Tree Protocol, Supports DSA
- IEEE 1588 functionality including both transparent and boundary clock
- Frame Preemption, Time Aware Shaping, Credit Based Shaping, Per-Stream
- Filtering and Policing, Frame Replication and Elimination for Reliability
- Highly Configurable
- 10M, 100M, 1G, and 10G/25G ports configurable at compile time
- TSN features can be enabled/disabled independently
- Comes with supporting Software
Easy to use
- Solid documentation including user manual
- Default configuration enables drop-in deployment
Silicon Agnostic
- Designed in Verilog and targeting both ASICs and FPGAs

Block Diagram

Applications

Aerospace
5G
ORAN
Industrial Automation
Industrial Networking

Deliverables

Code: System Verilog (Source code or Encrypted RTL)
Documentation: Including User Manual and Release Note
Simulation Environment: Simple Test Environment, Test Cases and Test Scripts
Programming Register Specification
Timing Constraints in Synopsys, SDC Format
Access to Support System
Software API
Synopsys SGDC Files
Synopsys Lint, CDC and Waivers

Technical Specifications

Maturity

Mature

Availability

Available

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