5GHz to 13.5GHz PLL - TSMC 130nm

Overview

The PLL13G is an ultra-low power phase locked loop (PLL) intellectual property (IP) block.

The PLL13G features a very small area footprint, with exceptional jitter performance in its power/area class and flexible programmability, making this IP ideal for a wide range of general purpose clocking and specialized applications.

The PLL13G is optimized for use in high- performance data converters with wide input bandwidths and/or high sampling rates and advanced interfaces such as PCIe.

The advanced IP block has been designed and verified in TSMC 130nm process.

Key Features

Input Frequency: ~40MHz
Output Frequency: 5.5-13.5 GHz
RMS Jitter: <350 fs
Supply Voltage: 1.2 V
Power: 50.88 mW
LC-Tank
TSMC 130nm Process
Area: 0.75 mm2
Radiation-tolerant Version Available: PLL13GRH

Benefits

Save time-to-market with our ready-to-go complete product solutions for your commercial or radiation tolerant specifications demands. Our IP uses the latest technology nodes for easy integration, or upon request, can be ported to other nodes.
Our IC project teams will become an extension of your system development group, allowing you to focus on your overall end products.

Applications

Imaging Systems:

CMOS & CCD Image Sensor Readout
Infrared FPA Readout
Medical Imaging Applications

5G Cellular Base Stations
Communications and Networking:

Microwave Receivers
Radar and Satellite Communications

Sensor/Detector Readout Applications
Automotive Applications
Noisy System-on-Chip environments

Deliverables

Silicon Validation Report
Layout View (gds2)
Integration Support

Technical Specifications

Foundry, Node

TSMC, 130nm CMOS FD-SOI

Maturity

Silicon Validated

TSMC

Silicon Proven: 130nm

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