The PLL200MT800M is a ultra-low power phase locked loop (PLL) intellectual property (IP) block.
It features a very small area footprint, with exceptional jitter performance in its power/area class, and widely flexible programmability, making it ideal for a wide range of general purpose clocking and specialized applications. The PLL200MT800M is optimized for use in high-performance imaging systems, such as high-speed image sensors.
The cost-effective IP block has been designed and verified for FDSOI processes and validated at 180 nm process.
The PLL IP is also available in a radiation-tolerant version, that can function under harsh environmental constraints.
200 MHz—800 Mhz Phase Locked Loop IP Block
Overview
Key Features
- Input Frequency: 200 MHz
- Output Frequency: 800 MHz
- Period Jitter: 4 ps
- VCO
- Hard IP Block
- X-Fab 180 nm process
- Silicon-Validated
- Radiation Tolerant version available: PLL800MRH
- Available as IP and Integrated Circuit
Benefits
- Save time-to-market with our ready-to-go complete product solutions for your commercial or radiation tolerant specifications demands. Our IP uses the latest technology nodes for easy integration, or upon request, can be ported to other nodes.
- Our IC project teams will become an extension of your system development group, allowing you to focus on your overall end products.
Applications
- Imaging Systems:
- CMOS & CCD Image Sensor Readout
- Infrared FPA Readout
- Medical Imaging Applications
- 5G Cellular Base Stations
- Communications and Networking:
- Microwave Receivers
- Radar and Satellite Communications
- Sensor/Detector Readout Applications
- Automotive Applications
- Noisy System-on-Chip environments
Deliverables
- Silicon Validation Report
- Layout View (gds2)
- Integration Support
Technical Specifications
Foundry, Node
X-Fab, 180nm CMOS FD-SOI
Maturity
Silicon Validated