1Gb Ethernet PCS
Overview
The GbE PCS Intellectual Property (IP) Core targets the programmable array section of the ORCA ORT42G5 FPSC and provides the PCS (Physical Coding Sub-layer) function.
Key Features
- Complete 1Gb Ethernet Physical Coding Sublayer Solution Based on the ORCA® ORT42G5 Device
- IP Targeted to the ORT42G5 Programmable Array Section Implements Functionality Conforming to IEEE 803.2-2002
- Encoding/decoding for GMII data octets
- Optional Auto-negotiation function with management registers and interface
- External GMII interface or internal interface to single chip MAC and PCS implementation
- Ethernet Functionality Supported by the Embedded Section of the ORT42G5, including:
- Support for 8b/10b encoding/decoding
- Serialization/deserialization of code groups for transmit/receive
- Clock recovery from encoded data stream
- Simulation Models and Test Benches
Block Diagram
