The agileCMP GP Programmable Threshold Comparator features a user-selectable (enable/disable) hysteresis as well as programmable threshold with 10mV step size, a latched output, as well as an active (unlatched) output. With a focus on long battery life, the agileCMP GP can be used to monitor external analog signals and enable wake-up events as is essential in many modern SoCs. The agileCMP GP Programmable Threshold Comparator is ideally suited for interrupt generation in applications such as in IoT, Security, Automotive, AI and general SoCs and ASICs.
Agile Analog designs are based on tried and tested architectures to ensure reliability and functionality. Our design methodology is programmatic, systematic and repeatable leading to analog IP that is more verifiable, more robust and more reliable. Our methodology also allows us to quickly re-target our IP to different process options. We support all the major foundries including TSMC, GlobalFoundries, Intel Foundry, Samsung Foundry, UMC and Other Foundries.
Programmable-Threshold Comparator
Overview
Key Features
- Configurable to your specification
- Rail-to-rail input voltage range
- Low threshold offset voltage
- Programmable threshold voltage
- Programmable hysteresis
- Dynamic and static (latched) outputs
- Low propagation delay
Benefits
- Best-in-class deliverables for easy and seamless integration: our engineers have extensive experience taking complex SoCs from design to mass production
- We believe that success is not just measured by delivery of netlist and layout, rather it extends to mass-production and beyond
- Automated design procedure accelerates design time and enables quick re-centering with latest PDK updates so you can tape out with the latest foundry models
- Tried and tested architecture ensures reliability and functionality
Block Diagram

Applications
- IoT, Security, Automotive, AI, SoCs, ASICs
Deliverables
- Datasheet
- Testing and Integration Guide
- Verilog Models
- Floorplan (LEF)
- Timing models (LIB)
- Netlist (CDL)
- Layout (GDS)
- Physical Verification Report
- Design Report
Technical Specifications
Foundry, Node
Intel
Maturity
Available on request
Availability
Now
Intel Foundry
Pre-Silicon:
16nm