Formal Verification Has It Covered!
Dave Kelf, OneSpin Solutions
EETimes (7/14/2017 02:41 PM EDT)
Reducing the risk of malfunctions that could ultimately lead to the physical harm of road users is a huge challenge. That's why many of the auto makers turn to formal verification.
The automotive industry is undergoing a period of rapid and disruptive transformations. Apparently, self-driving cars will be ready for urban ride-sharing fleets and equipped with no steering wheel or pedals by 2021. Vehicle-to-everything connectivity, autonomous driving, a new generation of human-machine interfaces and new industry players will bring a level of unprecedented creativity and innovation.
Innovation brings on new challenges. Chip verification design engineers of automotive and other mission-critical applications are facing two fresh challenges –– safety and security. The New York Times recently reported that security experts are in high demand with automobile manufacturers to help tackle cybersecurity threats. Security experts have it covered!
To read the full article, click here
Related Semiconductor IP
- USB 4.0 V2 PHY - 4TX/2RX, TSMC N3P , North/South Poly Orientation
- FH-OFDM Modem
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- PQC CRYSTALS core for accelerating NIST FIPS 202 FIPS 203 and FIPS 204
- USB Full Speed Transceiver
Related White Papers
- Formal verification: where to use it and why
- Viewpoint: Formal verification with constraints - It doesn't have to be like tightrope walking
- Formal, simulation, and AMBA verification IP combine to verify configurable powerline networking SoC
- How formal verification saves time in digital IP design
Latest White Papers
- FastPath: A Hybrid Approach for Efficient Hardware Security Verification
- Automotive IP-Cores: Evolution and Future Perspectives
- TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs
- How a Standardized Approach Can Accelerate Development of Safety and Security in Automotive Imaging Systems
- SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models