Simplifying AC and DC data acquisition signal chains

By Wasim Shaikh, Srikanth Nittala (Analog Devices)
embedded.com (August 12, 2020)

Sampling phenomena in analog-to-digital converters (ADCs) induce the problems of aliasing and capacitive kickback, and to solve these problems, designers use filters and driving amplifiers that introduce their own sets of challenges. This makes achieving precision dc and ac performance in medium bandwidth application areas a challenge and designers end up trading off system goals to do so.

This article describes continuous-time sigma-delta (∑-Δ) ADCs that inherently and dramatically solve the sampling problems by simplifying signal chains. They remove the need for antialiasing filters and buffers, and solve signal chain offset errors and drift issues associated with the additional components. These benefits shrink the solution size, ease solution design, and improve the phase matching and overall latency of the system. This article also draws a comparison with discrete-time converters and highlights system benefits, as well as the constraints of using continuous-time sigma-delta ADCs.

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