Power management in embedded software
Colin Walls, Mentor Graphics
embedded.com (August 21, 2015)
Power consumption by embedded devices is a critical issue. There is always a need to extend battery life and/or reduce the environmental impact of a system. Historically, this was purely a hardware issue, but those days are past. In modern embedded systems software takes an increasing responsibility for power management. This article reviews how power management is achieved while a device is operating and looks at the techniques employed to minimize power consumption when a device is inactive.
There are broadly two contexts in which a device's power consumption may be considered: when it is in use and when it is idle. In the former, active power management is the key requirement; in the latter, the deployment of low power CPU modes may be advantageous.
To read the full article, click here
Related Semiconductor IP
- NPU IP Core for Mobile
- MSP7-32 MACsec IP core for FPGA or ASIC
- UHF RFID tag IP with 3.6kBit EEPROM and -18dBm sensitivity
- NPU IP Core for Edge
- Specialized Video Processing NPU IP
Related White Papers
- Design considerations for power sensitive embedded devices
- Analog and Power Management Trends in ASIC and SoC Designs
- How NoCs ace power management and functional safety in SoCs
- The pivotal role power management IP plays in chip design
Latest White Papers
- Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution
- Transition Fixes in 3nm Multi-Voltage SoC Design
- CXL Topology-Aware and Expander-Driven Prefetching: Unlocking SSD Performance
- Breaking the Memory Bandwidth Boundary. GDDR7 IP Design Challenges & Solutions
- Automating NoC Design to Tackle Rising SoC Complexity