EDA is not enough!
By Michel Tabusse
edadesignline.com (March 17, 2010)
Good EDA tools, even combined within well-automated flows, are not enough to produce quality designs, whatever those designs are for software, systems-on-chip (SoCs), integrated circuits (ICs), intellectual property (IP) or embedded systems. Why is quality so difficult to achieve? Here are some of the things we are finding:
- Quality is often not defined operationally, making measurement and reporting onerous.
- Tools may be used incorrectly.
- Quality reporting is often informal, not objective, or comprised of too much information to be actionable.
- Worldwide teams and concurrent IP/ SoC/ software design produce burdensome quality monitoring overhead.
- Quality compromises tend to be made in order to meet tight schedules.
How does one define quality measures so that they can be easily deployed and used? Every time there is a panel on quality, designers and design managers realize that a huge amount of question-and-answer time is spent on defining quality criteria. And that quality is not the same for every type of design or every company.
To read the full article, click here
Related Semiconductor IP
- NFC wireless interface supporting ISO14443 A and B with EEPROM on SMIC 180nm
- PQC CRYSTALS core for accelerating NIST FIPS 202 FIPS 203 and FIPS 204
- AVSBus v1.4.1 Verification IP
- Flipchip 1.8V/3.3V I/O Library with ESD-hardened GPIOs in TSMC 12nm FFC/FFC+
- DDR5 MRDIMM PHY and Controller
Related White Papers
- Colibri, the codec for perfect quality and fast distribution of professional AV over IP
- Agile Analog's Approach to Analog IP Design and Quality --- Why "Silicon Proven" is NOT What You Think
- IP users value quality, support
- SoCs: Supporting Socketization -> Methodology key to quality
Latest White Papers
- FastPath: A Hybrid Approach for Efficient Hardware Security Verification
- Automotive IP-Cores: Evolution and Future Perspectives
- TROJAN-GUARD: Hardware Trojans Detection Using GNN in RTL Designs
- How a Standardized Approach Can Accelerate Development of Safety and Security in Automotive Imaging Systems
- SV-LLM: An Agentic Approach for SoC Security Verification using Large Language Models