Introduction to XML for engineering applications
(11/28/2005 9:00 AM EST)
EE Times
As indispensable as computers are in electronics design, they have too often failed in this context to support long-term business objectives. To date, there has been scarcely little effort to comprehensively capture and reuse the content of engineering calculations — whether data, formulas or variables — in project management, reporting, and regulatory compliance.
Too often, organizations lose track of engineering assumptions and the data that contributed to it. Traceability and accountability have largely been left in the hands of paper systems, or within tracking software operating separately from the engineering process.
But what if there were a way to incorporate reusability and accountability directly into the same work that produces the actual design? In other words, if the numbers used to create the final result of an engineering calculation are self-verifying, then design and accountability become one in the same process. By doing the design work, the engineer is simultaneously making the work recordable, traceable, manageable and reliable.
Combining accountability and design into the same process would not only increase the productivity of the individual engineer, but also improve the efficiency of the overall organization. This approach would enable the efficient decentralization of product development and manufacturing, faster time to market, more effective reuse of ideas and policies, better implementation of standards, and more effective compliance.
To support this decentralized collaboration, information must flow easily, coherently and instantly among different kinds of systems. XML makes this possible. Momentum behind XML has grown at a startling rate since its conception in 1996. The engineering community, however, is only now starting to realize its potential benefits.
To read the full article, click here
Related Semiconductor IP
- NPU IP Core for Mobile
- NPU IP Core for Edge
- Specialized Video Processing NPU IP
- HYPERBUS™ Memory Controller
- AV1 Video Encoder IP
Related White Papers
- An introduction to ARM Cortex-M0 DesignStart
- Introduction to Low Dropout (LDO) Linear Voltage Regulators
- Reduce Time to Market for FPGA-Based Communication and Datacenter Applications
- Time Sensitive Networking: An Introduction to TSN
Latest White Papers
- Ramping Up Open-Source RISC-V Cores: Assessing the Energy Efficiency of Superscalar, Out-of-Order Execution
- Transition Fixes in 3nm Multi-Voltage SoC Design
- CXL Topology-Aware and Expander-Driven Prefetching: Unlocking SSD Performance
- Breaking the Memory Bandwidth Boundary. GDDR7 IP Design Challenges & Solutions
- Automating NoC Design to Tackle Rising SoC Complexity