Implementing high Speed USB functionality with FPGA- and ASIC-based designs
Hridya Valsaraju and Gopalakrishnan Vijayakumar, Cypress Semiconductors
EETimes (10/18/2011 5:26 PM EDT)
The Universal Serial Bus (USB) has earned the popularity it now enjoys based on the merits of its ease of use, plug-and-play capabilities, and robustness. USB has, more or less, found its way into all the computer peripherals that once contained UARTs or parallel ports as their host interfaces, and any product which requires an interface to a host computer now considers USB as its primary option.
The various bandwidth choices that the USB offers – Low, Full, High, and now Super speed – cater to a variety of computer peripherals as well as industrial and medical equipment.
The throughput offered by USB is sufficient even for high bandwidth applications like hard disk drives and scanners. Indeed, for most of the computer peripherals like keyboards and mice, PDAs, gamepads, joysticks, scanners, digital cameras and printers, USB is now the standard interconnection method.
To read the full article, click here
Related Semiconductor IP
- USB 1.1 Host Controller IP
- USB 3.2 - Validates high-speed USB designs for protocol compliance and performance
- USB 4.0 - Enables fast data transfer, efficient power delivery, and connectivity
- USB Type-C and Power Delivery Verification IP
- USB 4.0 Verification IP
Related White Papers
- Why Hi-Speed USB doesn't always mean high speed performance
- SuperSpeed USB (USB 3.0): More than just a speed increase
- FPGA debugging techniques to speed up pre-silicon validation
- Generating High Speed CSI2 Video by an FPGA