A short primer on instruction set architecture
by Imen Baili , Menta
EDN (April 13, 2021)
In computer science, an instruction set architecture (ISA) is an abstract model of a computer. It’s also referred to as architecture or computer architecture. Moreover, a central processing unit (CPU), a venue of realization of an ISA, is called an implementation. An ISA specifies the behavior of machine code running on implementations of that ISA in a fashion that does not depend on the microarchitecture providing binary compatibility between implementations.
An ISA can be extended by adding instructions or other capabilities or adding support for larger addresses and data values. An implementation of the extended ISA will still be able to execute machine code for versions of the ISA without those extensions. Machine code using those extensions will only run on the implementations that support those extensions.
To read the full article, click here
Related Semiconductor IP
- eFPGA
- Heterogeneous eFPGA architecture with LUTs, DSPs, and BRAMs on GlobalFoundries GF12LP
- eFPGA on GlobalFoundries GF12LP
- eFPGA Hard IP Generator
- Radiation-Hardened eFPGA
Related White Papers
- IC design: A short primer on the formal methods-based verification
- Extending RISC-V ISA With a Custom Instruction Set Extension
- SoCs: Supporting Socketization -> Ready, set, reuse: A socketization primer
- Development and use of an Instruction Set Simulator of 68000-compatible processor core
Latest White Papers
- RISC-V in 2025: Progress, Challenges,and What’s Next for Automotive & OpenHardware
- Leveraging RISC-V as a Unified, Heterogeneous Platform for Next-Gen AI Chips
- Design and implementation of a hardened cryptographic coprocessor for a RISC-V 128-bit core
- CRAFT: Characterizing and Root-Causing Fault Injection Threats at Pre-Silicon
- How AI is changing the game for high-performance SoC designs