5 Tips for Creating a Custom ASIC
By Edel Griffith, Adesto Technologies
EETimes (May 4, 2020)
Much has been written about the advantages of custom ASICs over recent years. In particular, as the growth in the industrial Internet of things (IIoT) takes hold, more and more OEMs are looking to develop custom ASICs in order to generate a product that is specific and optimized to their exacting requirements. Due to the non-homogenous nature of IIoT requirements, OEMs who choose to use off-the-shelf standard parts may end up disadvantaging themselves by paying excessively for overly specified, non-optimized chips. Put simply, one-size does not fit all in the IIoT!
Custom application-specific ICs (ASICs) can help OEMs significantly cut the cost of overly specified products and streamline bill of materials management. As more and more companies take this route for their designs, here are some key tips to consider when navigating the custom ASIC path.
To read the full article, click here
Related Semiconductor IP
- 1.2V/1.8V GPIO Compliant with multiple standards in TSMC 16nm
- SLVS Transceiver in TSMC 28nm
- 0.9V/2.5V I/O Library in TSMC 55nm
- 1.8V/3.3V Multi-Voltage GPIO in TSMC 28nm
- 1.8V/3.3V I/O Library with 5V ODIO & Analog in TSMC 16nm
Related White Papers
- Creating a custom processor with RISC-V
- Paving the way for the next generation of audio codec for True Wireless Stereo (TWS) applications - PART 5 : Cutting time to market in a safe and timely manner
- ASIC design flow gives CPU core custom performance
- ASIC technology is morphing as demand for custom chips remains solid despite rising mask costs and slow growth in many end markets.