XMOS announces software-defined SoC platform now compatible with RISC-V
Fourth generation xcore® architecture delivers software-defined silicon to RISC-V users – ready to accelerate development of the intelligent IoT.
Bristol, UK, 12 December 2022 — XMOS today reveals a RISC-V compatible architecture for the fourth generation of its xcore platform. The collaboration delivers the flexibility to define entire systems in software, enabling RISC-V programmers to rapidly realise the most differentiated and economical solutions to the intelligent IoT.
By transitioning to a RISC-V compatible architecture, more embedded system designers will have access to the technical advantages of the xcore platform, while using the tools and processes that they are most accustomed to. Existing xcore users will also benefit from the familiarity and compatibility that comes with RISC-V and its growing ecosystem.
With xcore’s dynamic flexibility delivering any combination of AI, I/O, DSP, and standard compute in a single device, those familiar with standard embedded programming and AI techniques can quickly create systems in software that would previously have required an expensive and time-consuming chip design.
The move is a significant milestone in XMOS’s wider strategy of broadening access to its technology through the use of best-in-class open-source architectures, tools, and runtime software. This already includes LLVM, GDB, TensorFlow, C/C++, FreeRTOS, and numerous third-party models.
“We see xcore as the cutting-edge platform for the intelligent IoT. xcore software-defined SoCs deliver unparalleled cost-effectiveness, efficiency, and versatility to a market so fragmented that traditional SoC timescales and economics are failing,” commented Henk Muller, CTO, XMOS. “By combining xcore and RISC-V, we open xcore’s potential up to a much larger pool of talent; xcore and RISC-V developers now have common ground for the foundations of the intelligent IoT.
“Co-opting xcore and RISC-V users into the same ecosystem will accelerate the design of smart devices across a range of industries, from the smart home to the smart factory and beyond.”
Calista Redmond, CEO, RISC-V International, added: “Bringing the capabilities of XMOS and RISC-V together represents a great platform for developers to come together and realize greater potential in leveraging an open ISA for intelligent IoT.”
XMOS will be further discussing the adoption of the RISC-V architecture during the RISC-V Summit in San Jose this week.
If you would like to find out more about this announcement, further details can be found in our whitepaper, simply click to download.
About XMOS
A deep tech company at the leading edge of the intelligent internet of things (IoT), XMOS addresses the evolving market need for flexible compute to serve an ever-widening range of smart things including voice, imaging, and ambient sensing.
The company’s uniquely flexible xcore processors allow product designers to architect system-on-chip solutions purely in software, enabling faster time to market with differentiated systems that are cost-effective and energy efficient.
Related Semiconductor IP
- RISC-V CPU IP
- RISC-V Vector Extension
- RISC-V Real-time Processor
- RISC-V High Performance Processor
- 32b/64b RISC-V 5-stage, scalar, in-order, Application Processor. Linux and multi-core capable. Maps upto ARM A-35. Optimal PPA.
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