Xilinx Announces Industry's First Complete DDR400 SDRAM Interface Solution For FPGAs

Comprehensive suite of solutions accelerate design of 400 Mbps DDR SDRAM Controllers on FPGAs

SAN JOSE, Calif., April 24, 2003 - Xilinx, Inc., (NASDAQ:XLNX), today announced a complete suite of solutions to help advanced system designers to quickly implement FPGA-based interfaces to the latest breed of double data rate (DDR) synchronous dynamic random access memory (SDRAM) devices. Xilinx is the first FPGA supplier in the industry to deliver a hardware proven 400DDR SDRAM interface. The suite of solutions is comprised of free reference designs, detailed application notes and an evaluation board, to characterize and verify a 400 Mbps DDR SDRAM interface. The solutions provide customers with all the tools needed to design robust, flexible memory interface designs implemented in Xilinx Virtex-II and Virtex-II Pro FPGAs. Designers in the telecommunications and mass storage markets can leverage Xilinx's powerful memory interface solutions to deliver feature-rich, competitive end products in record time.

"The feature-rich fabric of our Virtex-II Pro FPGAs is the key to building robust, flexible interface designs," said Rina Raman, director of Applications at Xilinx. "The abundance and variety of resources on the FPGA allows us to deliver a reliable and accurate 400 Mbps interface design that can be easily customized to a variety of end products."

"These solutions provide designers with proven, next generation memory interfaces and Micron is pleased to have collaborated with the Xilinx engineering team in the development," said Terry Lee, executive director of Advanced Technology and Strategic Marketing for Micron's Computing and Consumer Group.

Xilinx offers two interface solutions including a 200MHz DDR SDRAM interface and DDR SDRAM DIMM interface. Both memory interface solutions take advantage of the powerful feature set on Virtex-II and Virtex-II Pro FPGAs, which provide an ideal platform for constructing the building blocks required in high-speed memory interface design. Capabilities such as digital clock managers (DCMs), digitally controlled impedance (DCI), on-chip support for HSTL, SSTL, and programmable DDR I/O banks are ideally suited for the clock and data synchronization tasks required to interface to the newest generations of memory technologies.

About the 200MHz DDR SDRAM Solution
The 200MHz DDR SDRAM interface solution features a free synthesizable reference design that achieves data rates of 400 Mbps using a 32-bit bus, which delivers data throughput on the controller bus at a rate of 12.8 Gbps. The design can be easily scaled to a 64-bit bus, delivering a bandwidth of 25.6 Gbps. The DCMs and flexible SelectI/O features offered on Virtex-II Pro FPGAs eliminate the need for special clock generators, I/O drivers, and external termination on the board. Users can also download a free Application Note by visiting www.xilinx.com/xapp/xapp253.pdf.

Rounding out the DDR SDRAM solution is the evaluation board from Insight Memec Design Services, an authorized Xilinx distributor. The board uses a Virtex-II XC2V1000-5 device to host an interface to a Micron DDR SDRAM in a 128 MB X 8 configurations. The evaluation board provides an excellent platform to explore and validate DDR SDRAM controller capabilities.

About the DDR SDRAM DIMM Interface Solution
The DDR SDRAM DIMM interface solution features a free HDL reference design that targets Xilinx's Virtex-II XC2V6000 -5 device and Micron's 256 MB MT16BDDT3264A DDR SDRAM DIMM, which is a 184-pin package using eight 100 MHz or 133MHz DDR SDRAM components. The DDR SDRAM DIMM reference design runs at 100MHz and uses two DCMs: one for clocking the logic inside the FPGA and the other to provide the clock externally to the DDR SDRAM DIMM. The phase relationship between the system clock and the two DCM-generated clocks provides an excellent way to register read data onto the FPGA fabric.

The DDR SDRAM DIMM reference design also comes with a free application note to ensure designers have a detailed recipe for hosting a proven DDR SDRAM DIMM controller on a Virtex-II or Virtex-II Pro FPGA. Users can download the Application Note at www.xilinx.com/xapp/xapp608.pdf.

Product Availability
Reference designs and applications notes can be downloaded at no charge from the Xilinx Memory Corner at www.xilinx.com/memory. For additional information regarding the Insight Memec evaluation boards, please visit www.insight-electronics.com.

About Xilinx
Xilinx, Inc. (NASDAQ: XLNX) is the worldwide leader of programmable logic solutions. Additional information about Xilinx is available at www.xilinx.com.

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