VSIA rolls new spec for signal integrity

EETimes

VSIA rolls new spec for signal integrity
By Michael Santarini, EE Times
October 27, 2003 (4:21 a.m. EST)
URL: http://www.eetimes.com/story/OEG20031024S0049

SAN JOSE, Calif. — The SoC and IP standards development group, the Virtual Socket Interface Alliance, has released a revised version of its signal integrity specification, now in the middle of VSIA member approval.

VSIA said the spec was originally created to identify signal-integrity issues for core creators and implementers. Version 2.0 builds on the original spirit of the specification, and specifically deals with critical SI effects below 0.1-micron process generation down to 0.07 microns and beyond in both digital and analog mixed-signal designs.

Changes in the 2.0 spec over the previous version include: the addition of a table in Appendix B that maps signal integrity deliverables to AMS and I-V deliverables; and an analysis of emerging and existing standards and their signal-integrity extensions in Appendix C, with an emphasis on future unified wire models.

It also includes more content about the impact of inductance on crosstalk and supply noise, and the separation of the Signal EM subsection from the crosstalk section (Sections 2.2 and 2.1, respectively).

VSIA said IBM, Intel, Cadence Design Systems Inc., Motorola, ARM plc and the VSIA Japanese Special Interest Group all contributed to the development of the signal integrity spec, which is expected to be approved and available to VSIA members by the fourth quarter.

×
Semiconductor IP