Videantis, a german startup, develops multimedia processor
| EE Times: German startup develops multimedia processor | |
| Peter Clarke (08/12/2005 6:57 AM EDT) URL: http://www.eetimes.com/showArticle.jhtml?articleID=168601019 | |
| LONDON A German university spin-off company has developed a parallel processing core for multimedia applications called the HiBRID-SoC. The device has been developed for flexibility and programmability in meeting multiple multimedia compression standards. Videantis GmbH (Hannover, Germany), a spin-off from the Institute of Microelectronic Systems and of the Information Technology Laboratory, University of Hannover, processor cores and application libraries and has applied its technology to real-time object-tracking in surveillance systems. On its website the company argued that while in the past dedicated solutions for a single multimedia standard or compression scheme had often been sufficient, the ability to support a wide range of existing and emerging standards has become a major criteria for the successful market introduction of devices. Multimedia system integrators are increasingly faced with tightening constraints on performance, power consumption, and on the multitude of schemes and standards that a system has to handle, the website said. According to a Videantis white paper, the HiBRID-SoC is a multi-core system-on-chip for multimedia signal processing that comprises three cores: A 16-datapath SIMD core with a two-dimensional matrix memory for image processing, a 64-bit VLIW processor with subword parallelism for block-based video coding, and a 32-bit scalar RISC core for bitstream processing and system control. The company did not discuss in the paper whether the RISC is home-grown or licensed. When implemented in a six-layer metal 0.18-micron CMOS process the HiBRID SoC occupies 81 square millimeters and can operate at 7-GOPS at a clock frequency of 145-MHz. The software library contains a wide range of target applications, including various versions of MPEG-4 and H.264/AVC.
| |
| - - | |
Related Semiconductor IP
- HBM4 PHY IP
- Ultra-Low-Power LPDDR3/LPDDR2/DDR3L Combo Subsystem
- MIPI D-PHY and FPD-Link (LVDS) Combinational Transmitter for TSMC 22nm ULP
- VIP for Compute Express Link (CXL)
- HBM4 Controller IP
Related News
- Videantis becomes member of German Automotive Cluster
- KI-FLEX AI chip tapes out with flexible videantis processor platform
- Processor Startup Innovates Memory Allocation Management
- videantis named among Germany's Fast 50 Growth Technology Companies
Latest News
- TSMC to Lead Rivals at 2-nm Node, Analysts Say
- Energy-efficient RF power modules developed using SOI technology
- Quintauris Demonstrates RISC-V Innovation in Automotive at CES
- UMC Reports Sales for December 2025
- Tenstorrent unveiled its first-generation compact AI accelerator device designed in partnership with Razer™ today at CES 2026