Tower Semiconductor Announces Cost Reduction Plan
The Company Plans to Reduce its Workforce to its 2003 Year-End Level
MIGDAL HAEMEK, Israel--(BUSINESS WIRE)--Nov. 15, 2004-- Tower Semiconductor Ltd. (Nasdaq: TSEM; TASE: TSEM), today announced that it is implementing a series of cost reduction measures to adjust its capital and operating expenditures to existing and short-term market conditions. Tower plans an across-the-board workforce cutback of approximately 170 positions, representing approximately 12 percent of Tower's employee base. The actions announced today are expected to be implemented by December 31, 2004 and produce net annualized savings of approximately $20 million in 2005 over today's run rate. During the first half of 2005, Tower expects that its 0.13 and 0.18 tool capacity will be approximately 15,000 wafers per month.
"While we are maintaining our positive long term outlook for the second quarter of 2005, based on new customers that are in various stages of designing and prototyping products in our fabs, we are responding to the existing and short-term market conditions, our recent financial results and an industry-wide inventory correction and slowdown, and have made some tough decisions to reduce our workforce and cut costs," said Carmel Vernia, chairman and chief executive officer of Tower. "Today's actions are a result of Tower's continual examination of every aspect of our business, and our goal to reach positive EBITDA by the second half of 2005."
"At the same time, we remain prepared to respond to customers' needs, and committed to our strategy of establishing Tower as a leading specialized foundry," added Vernia. "In line with our strategic roadmap, we expect to continue our level of investment in key process development initiatives, that would improve our unique technologies, which are less effected by market conditions. We are confident that we will continue to provide the highest level of award winning customer service and deliver exceptional customer value."
About Tower Semiconductor Ltd.
Tower Semiconductor LTD. is a pure-play independent wafer foundry established in 1993. The company manufactures integrated circuits with geometries ranging from 1.0 to 0.13 micron; it also provides complementary technical services and design support. In addition to digital CMOS process technology, Tower offers advanced non-volatile memory solutions, mixed-signal and CMOS image-sensor technologies. To provide world-class customer service, the company maintains two manufacturing facilities: Fab 1 has process technologies from 1.0 to 0.35 micron and can produce up to 16,000 150mm wafers per month. Fab 2 features 0.18-micron and below process technologies, including foundry-standard technology. When fully equipped, Fab 2 is expected to offer full production capacity of 33,000 200mm wafers per month. The Tower Web site is located at www.towersemi.com.
Safe Harbor
This press release includes forward-looking statements, which are subject to risks and uncertainties. Actual results may vary from those projected or implied by such forward-looking statements. Potential risks and uncertainties include, without limitation, risks and uncertainties associated with: (i) the completion of the equipment installation, technology transfer and ramp-up of production in Fab 2, (ii) having sufficient funds to complete the Fab 2 project, (iii) the cyclical nature of the semiconductor industry and the resulting periodic overcapacity, (iv) operating our facilities at satisfactory utilization rates, (v) the effect that our expected decrease in sales in the coming quarters will have on our ability to meet certain of the covenants stipulated in our amended facility agreement, which we currently forecast we will not meet in the next several quarters, (vi) our ability to capitalize on increases in demand for foundry services, (vii) meeting the conditions to receive Israeli government grants and tax benefits approved for Fab 2, which we currently forecast we may not meet, and obtaining the approval of the Israeli Investment Center to extend the five-year investment period under our Fab 2 approved enterprise program, (viii) attracting additional customers, (ix) not receiving orders from our wafer partners and technology providers, (x) failing to maintain and develop our technology processes and services, (xi) competing effectively, (xii) our large amount of debt, and (xiii) achieving acceptable device yields, product performance and delivery times. A more complete discussion of risks and uncertainties that may affect the accuracy of forward-looking statements included in this press release or which may otherwise affect our business is included under the heading "Risk Factors" in our most recent Annual Report on Form 20-F and in our Form F-3, as amended, as were filed with the Securities and Exchange Commission and the Israel Securities Authority.Related Semiconductor IP
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