Synopsys and TSMC Collaborate to Develop DesignWare Foundation IP for Low-Power TSMC 40-nm eFlash Processes

Logic Libraries and Embedded Memories for TSMC 40LP and 40ULP eFlash Processes Improve Energy Efficiency for IoT Devices

MOUNTAIN VIEW, Calif. -- Sept. 12, 2017 -- Synopsys, Inc. (Nasdaq: SNPS) today announced its collaboration with TSMC to develop foundry-sponsored DesignWare® Foundation IP, including logic libraries and embedded memories, for TSMC's 40-nanometer (nm) ultra-low power (ULP) eFlash and 40-nm low-power (LP) eFlash processes. Synopsys' Foundation IP on TSMC's 40-nm eFlash processes implements unique features that enable designers to reduce power consumption for IoT designs. The logic libraries include multiple channel gate lengths and ultra-low leakage standard cells to minimize leakage power, and offer power optimization kits and multi-bit flip-flops to achieve near-threshold operation down to 60 percent of nominal voltage. The embedded memories offer light sleep, deep sleep, and shut-down power management features for the lowest leakage, as well as assist circuitry to enable the lowest operating voltages. The DesignWare Logic Library and Embedded Memory IP on the TSMC 40-nm eFlash processes is available through Synopsys' Foundry-Sponsored IP Program, which enables qualified customers to license the IP at no cost from Synopsys.

"TSMC continues to build on our long history of collaboration with Synopsys to deliver high-quality, proven DesignWare IP on a wide range of TSMC processes that help our mutual customers achieve their design objectives," said Suk Lee, TSMC senior director, Design Infrastructure Marketing Division. "The availability of Synopsys' Foundation IP for our 40-nm eFlash processes demonstrates how Synopsys continually invests in developing IP that enables designers to achieve the best power and area for their SoCs."

"Synopsys and TSMC have worked closely together for many years to understand designers' specific performance, power and area requirements for their target applications," said John Koeter, vice president of marketing for IP at Synopsys. "By offering foundry-sponsored DesignWare Logic Library and Embedded Memory IP with differentiated low-power features for TSMC's 40ULP eFlash and 40LP eFlash processes, we are enabling designers to improve energy efficiency and extend battery life of their IoT products."

Availability

DesignWare Foundation IP for TSMC's 40ULP eFlash and 40LP eFlash processes is scheduled to be available in 2017 at no cost to qualified licensees as part of Synopsys' Foundry-Sponsored IP Program.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare® IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enable designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit www.synopsys.com/designware.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software™ partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.