Synopsys to add generative AI to design tools
By Nick Flaherty, eeNews Europe (August 21, 2023)
Synopsys is looking to add generative AI to its EDA tools to boost chip design productivity.
The company already uses a range of AI techniques in its tools from deep neural networks (DNNs) to recursive neural networks (RNNs). These are incorporated into the DSO.ai, VSI.ai and TSO.ai tools that have been used for well over 100 chip tapeouts.
Now the company is looking at the transformer network technologies used in generative AI (Gen-AI) to further enhance the tools says founder and retiring CEO Aart de Geus.
To read the full article, click here
Related Semiconductor IP
- NPU IP Core for Mobile
- NPU IP Core for Edge
- Specialized Video Processing NPU IP
- HYPERBUS™ Memory Controller
- AV1 Video Encoder IP
Related News
- Market Leaders Collaborate with Synopsys to Realize Gains of Generative AI Across Synopsys.ai Full EDA Stack
- Synopsys Showcases EDA Performance and Next-Gen Capabilities with NVIDIA Accelerated Computing, Generative AI and Omniverse
- HHGrace and Empyrean Continue Their Cooperation on Local EDA Tools to Facilitate IP Design
- AMIQ EDA Announces its Design and Verification Tools Eclipse IDE Supports Cadence Perspec System Verifier using System Level Notation
Latest News
- Jim Keller: ‘Whatever Nvidia Does, We’ll Do The Opposite’
- FlexGen Streamlines NoC Design as AI Demands Grow
- IntoPIX Presents Its New Titanium Software Suite: Empowering AV-Over-IP Workflows With Speed, Quality & Interoperability
- Global Semiconductor Sales Increase 2.5% Month-to-Month in April
- Speedata Raises $44M to Launch First-Ever Chip Designed Specifically for Accelerating Big Data Analytics - Compute's Second Largest Workload